From adb43a714e316ac58c03232e53d18cf6483b8252 Mon Sep 17 00:00:00 2001 From: Robert Lougher Date: Fri, 13 Mar 2015 20:35:45 +0000 Subject: [PATCH] Make tests more robust. No functional change. In preparation for recommit of revision 232190, change tests so that they are resilient to operands being commuted by the reassociate pass. git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@232206 91177308-0d34-0410-b5e6-96231b3b80d8 --- test/CodeGen/arm64_neon_high_half.c | 12 ++++++------ test/CodeGen/arm64_vtst.c | 8 ++++---- 2 files changed, 10 insertions(+), 10 deletions(-) diff --git a/test/CodeGen/arm64_neon_high_half.c b/test/CodeGen/arm64_neon_high_half.c index 577a09e3a2..6008ba5e55 100644 --- a/test/CodeGen/arm64_neon_high_half.c +++ b/test/CodeGen/arm64_neon_high_half.c @@ -394,32 +394,32 @@ uint32x4_t test_vqrshrn_high_n_u64(uint32x2_t lowpart, uint64x2_t input) { } int8x16_t test_vaddhn_high_s16(int8x8_t lowpart, int16x8_t lhs, int16x8_t rhs) { - // CHECK: addhn2.16b v0, v1, v2 + // CHECK: addhn2.16b v0, {{v1, v2|v2, v1}} return vaddhn_high_s16(lowpart, lhs, rhs); } int16x8_t test_vaddhn_high_s32(int16x4_t lowpart, int32x4_t lhs, int32x4_t rhs) { - // CHECK: addhn2.8h v0, v1, v2 + // CHECK: addhn2.8h v0, {{v1, v2|v2, v1}} return vaddhn_high_s32(lowpart, lhs, rhs); } int32x4_t test_vaddhn_high_s64(int32x2_t lowpart, int64x2_t lhs, int64x2_t rhs) { - // CHECK: addhn2.4s v0, v1, v2 + // CHECK: addhn2.4s v0, {{v1, v2|v2, v1}} return vaddhn_high_s64(lowpart, lhs, rhs); } uint8x16_t test_vaddhn_high_u16(uint8x8_t lowpart, uint16x8_t lhs, uint16x8_t rhs) { - // CHECK: addhn2.16b v0, v1, v2 + // CHECK: addhn2.16b v0, {{v1, v2|v2, v1}} return vaddhn_high_s16(lowpart, lhs, rhs); } uint16x8_t test_vaddhn_high_u32(uint16x4_t lowpart, uint32x4_t lhs, uint32x4_t rhs) { - // CHECK: addhn2.8h v0, v1, v2 + // CHECK: addhn2.8h v0, {{v1, v2|v2, v1}} return vaddhn_high_s32(lowpart, lhs, rhs); } uint32x4_t test_vaddhn_high_u64(uint32x2_t lowpart, uint64x2_t lhs, uint64x2_t rhs) { - // CHECK: addhn2.4s v0, v1, v2 + // CHECK: addhn2.4s v0, {{v1, v2|v2, v1}} return vaddhn_high_s64(lowpart, lhs, rhs); } diff --git a/test/CodeGen/arm64_vtst.c b/test/CodeGen/arm64_vtst.c index f40c62c4a3..9f3ed84236 100644 --- a/test/CodeGen/arm64_vtst.c +++ b/test/CodeGen/arm64_vtst.c @@ -4,18 +4,18 @@ #include uint64x2_t test_vtstq_s64(int64x2_t a1, int64x2_t a2) { - // CHECK: test_vtstq_s64 + // CHECK-LABEL: test_vtstq_s64 return vtstq_s64(a1, a2); - // CHECK: [[COMMONBITS:%[A-Za-z0-9.]+]] = and <2 x i64> %a1, %a2 + // CHECK: [[COMMONBITS:%[A-Za-z0-9.]+]] = and <2 x i64> {{%a1, %a2|%a2, %a1}} // CHECK: [[MASK:%[A-Za-z0-9.]+]] = icmp ne <2 x i64> [[COMMONBITS]], zeroinitializer // CHECK: [[RES:%[A-Za-z0-9.]+]] = sext <2 x i1> [[MASK]] to <2 x i64> // CHECK: ret <2 x i64> [[RES]] } uint64x2_t test_vtstq_u64(uint64x2_t a1, uint64x2_t a2) { - // CHECK: test_vtstq_u64 + // CHECK-LABEL: test_vtstq_u64 return vtstq_u64(a1, a2); - // CHECK: [[COMMONBITS:%[A-Za-z0-9.]+]] = and <2 x i64> %a1, %a2 + // CHECK: [[COMMONBITS:%[A-Za-z0-9.]+]] = and <2 x i64> {{%a1, %a2|%a2, %a1}} // CHECK: [[MASK:%[A-Za-z0-9.]+]] = icmp ne <2 x i64> [[COMMONBITS]], zeroinitializer // CHECK: [[RES:%[A-Za-z0-9.]+]] = sext <2 x i1> [[MASK]] to <2 x i64> // CHECK: ret <2 x i64> [[RES]] -- 2.40.0