From ab677c51822410a1f9a057eb343fc7ebb49b36d0 Mon Sep 17 00:00:00 2001 From: Justin Lebar Date: Wed, 6 Jul 2016 21:06:10 +0000 Subject: [PATCH] [NVPTX] Add sm_60, sm_61, sm_62 targets to LLVM. Reviewers: tra Subscribers: jholewinski, llvm-commits Differential Revision: http://reviews.llvm.org/D22068 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@274674 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/Target/NVPTX/NVPTX.td | 14 +++++++++++++- test/CodeGen/NVPTX/sm-version-60.ll | 5 +++++ test/CodeGen/NVPTX/sm-version-61.ll | 5 +++++ test/CodeGen/NVPTX/sm-version-62.ll | 5 +++++ 4 files changed, 28 insertions(+), 1 deletion(-) create mode 100644 test/CodeGen/NVPTX/sm-version-60.ll create mode 100644 test/CodeGen/NVPTX/sm-version-61.ll create mode 100644 test/CodeGen/NVPTX/sm-version-62.ll diff --git a/lib/Target/NVPTX/NVPTX.td b/lib/Target/NVPTX/NVPTX.td index 96abfa85911..032991a20cc 100644 --- a/lib/Target/NVPTX/NVPTX.td +++ b/lib/Target/NVPTX/NVPTX.td @@ -44,6 +44,12 @@ def SM52 : SubtargetFeature<"sm_52", "SmVersion", "52", "Target SM 5.2">; def SM53 : SubtargetFeature<"sm_53", "SmVersion", "53", "Target SM 5.3">; +def SM60 : SubtargetFeature<"sm_60", "SmVersion", "60", + "Target SM 6.0">; +def SM61 : SubtargetFeature<"sm_61", "SmVersion", "61", + "Target SM 6.1">; +def SM62 : SubtargetFeature<"sm_62", "SmVersion", "62", + "Target SM 6.2">; // PTX Versions def PTX32 : SubtargetFeature<"ptx32", "PTXVersion", "32", @@ -54,6 +60,10 @@ def PTX41 : SubtargetFeature<"ptx41", "PTXVersion", "41", "Use PTX version 4.1">; def PTX42 : SubtargetFeature<"ptx42", "PTXVersion", "42", "Use PTX version 4.2">; +def PTX43 : SubtargetFeature<"ptx43", "PTXVersion", "43", + "Use PTX version 4.3">; +def PTX50 : SubtargetFeature<"ptx50", "PTXVersion", "50", + "Use PTX version 5.0">; //===----------------------------------------------------------------------===// // NVPTX supported processors. @@ -71,7 +81,9 @@ def : Proc<"sm_37", [SM37, PTX41]>; def : Proc<"sm_50", [SM50, PTX40]>; def : Proc<"sm_52", [SM52, PTX41]>; def : Proc<"sm_53", [SM53, PTX42]>; - +def : Proc<"sm_60", [SM60, PTX50]>; +def : Proc<"sm_61", [SM61, PTX50]>; +def : Proc<"sm_62", [SM62, PTX50]>; def NVPTXInstrInfo : InstrInfo { } diff --git a/test/CodeGen/NVPTX/sm-version-60.ll b/test/CodeGen/NVPTX/sm-version-60.ll new file mode 100644 index 00000000000..4f6b508a70b --- /dev/null +++ b/test/CodeGen/NVPTX/sm-version-60.ll @@ -0,0 +1,5 @@ +; RUN: llc < %s -march=nvptx -mcpu=sm_60 | FileCheck %s +; RUN: llc < %s -march=nvptx64 -mcpu=sm_60 | FileCheck %s + +; CHECK: .version 5.0 +; CHECK: .target sm_60 diff --git a/test/CodeGen/NVPTX/sm-version-61.ll b/test/CodeGen/NVPTX/sm-version-61.ll new file mode 100644 index 00000000000..535ef066d0c --- /dev/null +++ b/test/CodeGen/NVPTX/sm-version-61.ll @@ -0,0 +1,5 @@ +; RUN: llc < %s -march=nvptx -mcpu=sm_61 | FileCheck %s +; RUN: llc < %s -march=nvptx64 -mcpu=sm_61 | FileCheck %s + +; CHECK: .version 5.0 +; CHECK: .target sm_61 diff --git a/test/CodeGen/NVPTX/sm-version-62.ll b/test/CodeGen/NVPTX/sm-version-62.ll new file mode 100644 index 00000000000..7d425b6d12e --- /dev/null +++ b/test/CodeGen/NVPTX/sm-version-62.ll @@ -0,0 +1,5 @@ +; RUN: llc < %s -march=nvptx -mcpu=sm_62 | FileCheck %s +; RUN: llc < %s -march=nvptx64 -mcpu=sm_62 | FileCheck %s + +; CHECK: .version 5.0 +; CHECK: .target sm_62 -- 2.50.0