From a8f4133a65ce6716a50ff5f55cbaa2ddac310bdd Mon Sep 17 00:00:00 2001 From: Craig Topper Date: Thu, 31 Jan 2019 00:04:46 +0000 Subject: [PATCH] [X86] Remove handling of ISD::INTRINSIC_WO_CHAIN in ReplaceNodeResults. I believe this was there to handle avx512bw intrinsics that returned i64 type in 32-bit mode. But all those intrinsics have since been changed to v64i1 results or replaced with generic IR. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@352698 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/Target/X86/X86ISelLowering.cpp | 6 ------ 1 file changed, 6 deletions(-) diff --git a/lib/Target/X86/X86ISelLowering.cpp b/lib/Target/X86/X86ISelLowering.cpp index fd42dcf1a3c..39fdafede7f 100644 --- a/lib/Target/X86/X86ISelLowering.cpp +++ b/lib/Target/X86/X86ISelLowering.cpp @@ -1787,7 +1787,6 @@ X86TargetLowering::X86TargetLowering(const X86TargetMachine &TM, setOperationAction(ISD::INTRINSIC_VOID, MVT::Other, Custom); if (!Subtarget.is64Bit()) { setOperationAction(ISD::INTRINSIC_W_CHAIN, MVT::i64, Custom); - setOperationAction(ISD::INTRINSIC_WO_CHAIN, MVT::i64, Custom); } // Only custom-lower 64-bit SADDO and friends on 64-bit because we don't @@ -26923,11 +26922,6 @@ void X86TargetLowering::ReplaceNodeResults(SDNode *N, return getExtendedControlRegister(N, dl, DAG, Subtarget, Results); } } - case ISD::INTRINSIC_WO_CHAIN: { - if (SDValue V = LowerINTRINSIC_WO_CHAIN(SDValue(N, 0), DAG)) - Results.push_back(V); - return; - } case ISD::READCYCLECOUNTER: { return getReadTimeStampCounter(N, dl, X86ISD::RDTSC_DAG, DAG, Subtarget, Results); -- 2.40.0