From a337b33ab39c631768c60449b5b2857bedabf487 Mon Sep 17 00:00:00 2001 From: Christian Pirker Date: Mon, 5 May 2014 08:48:18 +0000 Subject: [PATCH] Simplify getARMCPUForMArch() and make it more consistent git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@207956 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/Driver/Tools.cpp | 92 +++++++++++++++-------------------- test/Driver/arm-cortex-cpus.c | 14 ++++++ 2 files changed, 53 insertions(+), 53 deletions(-) diff --git a/lib/Driver/Tools.cpp b/lib/Driver/Tools.cpp index fe0b727b1d..247d0d8cfa 100644 --- a/lib/Driver/Tools.cpp +++ b/lib/Driver/Tools.cpp @@ -4889,63 +4889,49 @@ const char *arm::getARMCPUForMArch(const ArgList &Args, break; } - const char *result = llvm::StringSwitch(MArch) - .Cases("armv2", "armv2a","arm2") - .Case("armv3", "arm6") - .Case("armv3m", "arm7m") - .Case("armv4", "strongarm") - .Case("armv4t", "arm7tdmi") - .Case("thumbv4t", "arm7tdmi") - .Cases("armv5", "armv5t", "arm10tdmi") - .Cases("thumbv5", "thumbv5t", "arm10tdmi") - .Cases("armv5e", "armv5te", "arm1022e") - .Cases("thumbv5e", "thumbv5te", "arm1022e") - .Case("armv5tej", "arm926ej-s") - .Case("thumbv5tej", "arm926ej-s") - .Cases("armv6", "armv6k", "arm1136jf-s") - .Cases("thumbv6", "thumbv6k", "arm1136jf-s") - .Case("armv6j", "arm1136j-s") - .Case("thumbv6j", "arm1136j-s") - .Cases("armv6z", "armv6zk", "arm1176jzf-s") - .Cases("thumbv6z", "thumbv6zk", "arm1176jzf-s") - .Case("armv6t2", "arm1156t2-s") - .Case("thumbv6t2", "arm1156t2-s") - .Cases("armv6m", "armv6-m", "cortex-m0") - .Case("thumbv6m", "cortex-m0") - .Cases("armv7", "armv7a", "armv7-a", "cortex-a8") - .Cases("armebv7", "armebv7a", "armebv7-a", "cortex-a8") - .Cases("thumbv7", "thumbv7a", "cortex-a8") - .Cases("thumbebv7", "thumbebv7a", "cortex-a8") - .Cases("armv7l", "armv7-l", "cortex-a8") - .Cases("armebv7l", "armebv7-l", "cortex-a8") - .Cases("armv7s", "armv7-s", "swift") - .Cases("armebv7s", "armebv7-s", "swift") - .Cases("armv7r", "armv7-r", "cortex-r4") - .Cases("armebv7r", "armebv7-r", "cortex-r4") - .Case("thumbv7r", "cortex-r4") - .Case("thumbebv7r", "cortex-r4") - .Cases("armv7m", "armv7-m", "cortex-m3") - .Cases("armebv7m", "armebv7-m", "cortex-m3") - .Case("thumbv7m", "cortex-m3") - .Case("thumbebv7m", "cortex-m3") - .Cases("armv7em", "armv7e-m", "cortex-m4") - .Cases("armebv7em", "armebv7e-m", "cortex-m4") - .Cases("thumbv7em", "thumbv7e-m", "cortex-m4") - .Cases("thumbebv7em", "thumbebv7e-m", "cortex-m4") - .Cases("armv8", "armv8a", "armv8-a", "cortex-a53") - .Cases("armebv8", "armebv8a", "armebv8-a", "cortex-a53") - .Cases("thumbv8", "thumbv8a", "cortex-a53") - .Cases("thumbebv8", "thumbebv8a", "cortex-a53") - .Case("ep9312", "ep9312") - .Case("iwmmxt", "iwmmxt") - .Case("xscale", "xscale") - // If all else failed, return the most base CPU with thumb interworking - // supported by LLVM. - .Default(0); + const char *result = nullptr; + size_t offset = StringRef::npos; + if (MArch.startswith("arm")) + offset = 3; + if (MArch.startswith("thumb")) + offset = 5; + if (offset != StringRef::npos && MArch.substr(offset, 2) == "eb") + offset += 2; + if (offset != StringRef::npos) + result = llvm::StringSwitch(MArch.substr(offset)) + .Cases("v2", "v2a", "arm2") + .Case("v3", "arm6") + .Case("v3m", "arm7m") + .Case("v4", "strongarm") + .Case("v4t", "arm7tdmi") + .Cases("v5", "v5t", "arm10tdmi") + .Cases("v5e", "v5te", "arm1022e") + .Case("v5tej", "arm926ej-s") + .Cases("v6", "v6k", "arm1136jf-s") + .Case("v6j", "arm1136j-s") + .Cases("v6z", "v6zk", "arm1176jzf-s") + .Case("v6t2", "arm1156t2-s") + .Cases("v6m", "v6-m", "cortex-m0") + .Cases("v7", "v7a", "v7-a", "v7l", "v7-l", "cortex-a8") + .Cases("v7s", "v7-s", "swift") + .Cases("v7r", "v7-r", "cortex-r4") + .Cases("v7m", "v7-m", "cortex-m3") + .Cases("v7em", "v7e-m", "cortex-m4") + .Cases("v8", "v8a", "v8-a", "cortex-a53") + .Default(nullptr); + else + result = llvm::StringSwitch(MArch) + .Case("ep9312", "ep9312") + .Case("iwmmxt", "iwmmxt") + .Case("xscale", "xscale") + .Default(nullptr); if (result) return result; + // If all else failed, return the most base CPU with thumb interworking + // supported by LLVM. + // FIXME: Should warn once that we're falling back. switch (Triple.getOS()) { case llvm::Triple::NetBSD: switch (Triple.getEnvironment()) { diff --git a/test/Driver/arm-cortex-cpus.c b/test/Driver/arm-cortex-cpus.c index d2822b618a..224ba575dd 100644 --- a/test/Driver/arm-cortex-cpus.c +++ b/test/Driver/arm-cortex-cpus.c @@ -71,6 +71,10 @@ // RUN: %clang -target arm -march=armv6m -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-V6M %s // CHECK-V6M: "-cc1"{{.*}} "-triple" "thumbv6m-{{.*}} "-target-cpu" "cortex-m0" +// RUN: %clang -target armv6m -mbig-endian -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-V6M-BIG %s +// RUN: %clang -target arm -march=armv6m -mbig-endian -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-V6M-BIG %s +// CHECK-V6M-BIG: "-cc1"{{.*}} "-triple" "thumbebv6m-{{.*}} "-target-cpu" "cortex-m0" + // RUN: %clang -target armv7m -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-V7M %s // RUN: %clang -target arm -march=armv7-m -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-V7M %s // CHECK-V7M: "-cc1"{{.*}} "-triple" "thumbv7m-{{.*}} "-target-cpu" "cortex-m3" @@ -79,6 +83,10 @@ // RUN: %clang -target arm -march=armv7e-m -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-V7EM %s // CHECK-V7EM: "-cc1"{{.*}} "-triple" "thumbv7em-{{.*}} "-target-cpu" "cortex-m4" +// RUN: %clang -target armv7em -mbig-endian -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-V7EM-BIG %s +// RUN: %clang -target arm -march=armv7e-m -mbig-endian -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-V7EM-BIG %s +// CHECK-V7EM-BIG: "-cc1"{{.*}} "-triple" "thumbebv7em-{{.*}} "-target-cpu" "cortex-m4" + // RUN: %clang -target armv6m-apple-darwin -arch armv6m -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-V6M-DARWIN %s // CHECK-V6M-DARWIN: "-cc1"{{.*}} "-triple" "thumbv6m-{{.*}} "-target-cpu" "cortex-m0" @@ -148,6 +156,12 @@ // RUN: %clang -target arm -march=armebv8a -mbig-endian -mthumb -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-BE-V8A-THUMB %s // CHECK-BE-V8A-THUMB: "-cc1"{{.*}} "-triple" "thumbebv8-{{.*}}" "-target-cpu" "cortex-a53" +// ================== Check default CPU on bogus architecture +// RUN: %clang -target arm -march=armbogusv6 -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-BOGUS %s +// CHECK-BOGUS: "-cc1"{{.*}} "-triple" "armv4t-{{.*}} "-target-cpu" "arm7tdmi" +// RUN: %clang -target arm---eabihf -march=armbogusv7 -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-BOGUS-HF %s +// CHECK-BOGUS-HF: "-cc1"{{.*}} "-triple" "armv6-{{.*}} "-target-cpu" "arm1176jzf-s" + // ================== Check default Architecture on each Cortex CPU // RUN: %clang -target arm-linux-gnueabi -mcpu=cortex-a5 -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-CPUV7A %s // RUN: %clang -target arm-linux-gnueabi -mcpu=cortex-a7 -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-CPUV7A %s -- 2.40.0