From a2c7f93de8bb14d52fb362196b1f0ac6092961cf Mon Sep 17 00:00:00 2001 From: Matt Arsenault Date: Fri, 18 Jan 2019 21:33:50 +0000 Subject: [PATCH] AMDGPU/GlobalISel: Legalize illegal g_constant git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@351596 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp | 13 +++- .../AMDGPU/GlobalISel/legalize-constant.mir | 78 +++++++++++++------ .../AMDGPU/GlobalISel/legalize-fconstant.mir | 40 ++++++++++ 3 files changed, 105 insertions(+), 26 deletions(-) create mode 100644 test/CodeGen/AMDGPU/GlobalISel/legalize-fconstant.mir diff --git a/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp b/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp index ef85c104054..b73386ec443 100644 --- a/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp +++ b/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp @@ -33,6 +33,7 @@ AMDGPULegalizerInfo::AMDGPULegalizerInfo(const GCNSubtarget &ST, }; const LLT S1 = LLT::scalar(1); + const LLT S16 = LLT::scalar(16); const LLT S32 = LLT::scalar(32); const LLT S64 = LLT::scalar(64); const LLT S512 = LLT::scalar(512); @@ -109,7 +110,7 @@ AMDGPULegalizerInfo::AMDGPULegalizerInfo(const GCNSubtarget &ST, setAction({G_BITCAST, 1, V2S16}, Legal); getActionDefinitionsBuilder(G_FCONSTANT) - .legalFor({S32, S64}); + .legalFor({S32, S64, S16}); // G_IMPLICIT_DEF is a no-op so we can make it legal for any value type that // can fit in a register. @@ -121,13 +122,15 @@ AMDGPULegalizerInfo::AMDGPULegalizerInfo(const GCNSubtarget &ST, }) .clampScalar(0, S1, S512); - getActionDefinitionsBuilder(G_CONSTANT) - .legalFor({S1, S32, S64}); // FIXME: i1 operands to intrinsics should always be legal, but other i1 // values may not be legal. We need to figure out how to distinguish // between these two scenarios. - setAction({G_CONSTANT, S1}, Legal); + // FIXME: Pointer types + getActionDefinitionsBuilder(G_CONSTANT) + .legalFor({S1, S32, S64, V2S32, V2S16}) + .clampScalar(0, S32, S64) + .widenScalarToNextPow2(0); setAction({G_FRAME_INDEX, PrivatePtr}, Legal); @@ -155,7 +158,9 @@ AMDGPULegalizerInfo::AMDGPULegalizerInfo(const GCNSubtarget &ST, setAction({G_SEXT, 1, S32}, Legal); setAction({G_ANYEXT, S64}, Legal); + setAction({G_ANYEXT, S32}, Legal); setAction({G_ANYEXT, 1, S32}, Legal); + setAction({G_ANYEXT, 1, S16}, Legal); setAction({G_FPTOSI, S32}, Legal); setAction({G_FPTOSI, 1, S32}, Legal); diff --git a/test/CodeGen/AMDGPU/GlobalISel/legalize-constant.mir b/test/CodeGen/AMDGPU/GlobalISel/legalize-constant.mir index 56da4e3add5..c25f329261d 100644 --- a/test/CodeGen/AMDGPU/GlobalISel/legalize-constant.mir +++ b/test/CodeGen/AMDGPU/GlobalISel/legalize-constant.mir @@ -2,59 +2,93 @@ # RUN: llc -mtriple=amdgcn-mesa-mesa3d -mcpu=fiji -O0 -run-pass=legalizer %s -o - | FileCheck %s --- -name: test_constant_i32 +name: test_constant_s32 body: | bb.0: - ; CHECK-LABEL: name: test_constant_i32 + ; CHECK-LABEL: name: test_constant_s32 ; CHECK: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 5 ; CHECK: $vgpr0 = COPY [[C]](s32) %0:_(s32) = G_CONSTANT i32 5 $vgpr0 = COPY %0 ... --- -name: test_constant_i64 +name: test_constant_s64 body: | bb.0: - ; CHECK-LABEL: name: test_constant_i64 + ; CHECK-LABEL: name: test_constant_s64 ; CHECK: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 5 ; CHECK: $vgpr0_vgpr1 = COPY [[C]](s64) %0:_(s64) = G_CONSTANT i64 5 $vgpr0_vgpr1 = COPY %0 ... + --- -name: test_fconstant_f32 +name: test_constant_s1 body: | bb.0: - ; CHECK-LABEL: name: test_fconstant_f32 - ; CHECK: [[C:%[0-9]+]]:_(s32) = G_FCONSTANT float 1.000000e+00 - ; CHECK: $vgpr0 = COPY [[C]](s32) - %0:_(s32) = G_FCONSTANT float 1.0 - $vgpr0 = COPY %0 + ; CHECK-LABEL: name: test_constant_s1 + ; CHECK: [[C:%[0-9]+]]:_(s1) = G_CONSTANT i1 false + ; CHECK: S_ENDPGM implicit [[C]](s1) + %1:_(s1) = G_CONSTANT i1 0 + S_ENDPGM implicit %1 ... + --- -name: test_fconstant_f64 +name: test_constant_s7 body: | bb.0: - ; CHECK-LABEL: name: test_fconstant_f64 - ; CHECK: [[C:%[0-9]+]]:_(s64) = G_FCONSTANT double 1.000000e+00 - ; CHECK: $vgpr0_vgpr1 = COPY [[C]](s64) - %0:_(s64) = G_FCONSTANT double 1.0 - $vgpr0_vgpr1 = COPY %0 + ; CHECK-LABEL: name: test_constant_s7 + ; CHECK: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 5 + ; CHECK: [[COPY:%[0-9]+]]:_(s32) = COPY [[C]](s32) + ; CHECK: $vgpr0 = COPY [[COPY]](s32) + %0:_(s7) = G_CONSTANT i7 5 + %1:_(s32) = G_ANYEXT %0 + $vgpr0 = COPY %1 ... --- -name: test_constant_1 +name: test_constant_s8 body: | bb.0: - ; CHECK-LABEL: name: test_constant_1 - ; CHECK: [[C:%[0-9]+]]:_(s1) = G_CONSTANT i1 false - ; CHECK: S_ENDPGM implicit [[C]](s1) - %1:_(s1) = G_CONSTANT i1 0 - S_ENDPGM implicit %1 + ; CHECK-LABEL: name: test_constant_s8 + ; CHECK: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 5 + ; CHECK: [[COPY:%[0-9]+]]:_(s32) = COPY [[C]](s32) + ; CHECK: $vgpr0 = COPY [[COPY]](s32) + %0:_(s8) = G_CONSTANT i8 5 + %1:_(s32) = G_ANYEXT %0 + $vgpr0 = COPY %1 +... + +--- +name: test_constant_s16 +body: | + bb.0: + + ; CHECK-LABEL: name: test_constant_s16 + ; CHECK: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 5 + ; CHECK: [[COPY:%[0-9]+]]:_(s32) = COPY [[C]](s32) + ; CHECK: $vgpr0 = COPY [[COPY]](s32) + %0:_(s16) = G_CONSTANT i16 5 + %1:_(s32) = G_ANYEXT %0 + $vgpr0 = COPY %1 +... + +--- +name: test_constant_s128 +body: | + bb.0: + + ; CHECK-LABEL: name: test_constant_s128 + ; CHECK: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 5 + ; CHECK: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 0 + ; CHECK: [[MV:%[0-9]+]]:_(s128) = G_MERGE_VALUES [[C]](s64), [[C1]](s64) + ; CHECK: $vgpr0_vgpr1_vgpr2_vgpr3 = COPY [[MV]](s128) + %0:_(s128) = G_CONSTANT i128 5 + $vgpr0_vgpr1_vgpr2_vgpr3 = COPY %0 ... diff --git a/test/CodeGen/AMDGPU/GlobalISel/legalize-fconstant.mir b/test/CodeGen/AMDGPU/GlobalISel/legalize-fconstant.mir new file mode 100644 index 00000000000..8d9485dc6d8 --- /dev/null +++ b/test/CodeGen/AMDGPU/GlobalISel/legalize-fconstant.mir @@ -0,0 +1,40 @@ +# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py +# RUN: llc -mtriple=amdgcn-mesa-mesa3d -mcpu=tahiti -O0 -run-pass=legalizer %s -o - | FileCheck %s +# RUN: llc -mtriple=amdgcn-mesa-mesa3d -mcpu=fiji -O0 -run-pass=legalizer %s -o - | FileCheck %s + +--- +name: test_fconstant_s32 +body: | + bb.0: + + ; CHECK-LABEL: name: test_fconstant_s32 + ; CHECK: [[C:%[0-9]+]]:_(s32) = G_FCONSTANT float 1.000000e+00 + ; CHECK: $vgpr0 = COPY [[C]](s32) + %0:_(s32) = G_FCONSTANT float 1.0 + $vgpr0 = COPY %0 +... +--- +name: test_fconstant_s64 +body: | + bb.0: + + ; CHECK-LABEL: name: test_fconstant_s64 + ; CHECK: [[C:%[0-9]+]]:_(s64) = G_FCONSTANT double 1.000000e+00 + ; CHECK: $vgpr0_vgpr1 = COPY [[C]](s64) + %0:_(s64) = G_FCONSTANT double 1.0 + $vgpr0_vgpr1 = COPY %0 +... + +--- +name: test_fconstant_s16 +body: | + bb.0: + + ; CHECK-LABEL: name: test_fconstant_s16 + ; CHECK: [[C:%[0-9]+]]:_(s16) = G_FCONSTANT half 0xH3C00 + ; CHECK: [[ANYEXT:%[0-9]+]]:_(s32) = G_ANYEXT [[C]](s16) + ; CHECK: $vgpr0 = COPY [[ANYEXT]](s32) + %0:_(s16) = G_FCONSTANT half 1.0 + %1:_(s32) = G_ANYEXT %0 + $vgpr0 = COPY %1 +... -- 2.50.1