From 9defcc42050b65cad14e9aaa1d8bd20ef60a195b Mon Sep 17 00:00:00 2001 From: Sanjay Patel Date: Thu, 13 Apr 2017 16:05:01 +0000 Subject: [PATCH] [InstCombine] fix assert to not always be true git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@300202 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/Transforms/InstCombine/InstCombineAndOrXor.cpp | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/lib/Transforms/InstCombine/InstCombineAndOrXor.cpp b/lib/Transforms/InstCombine/InstCombineAndOrXor.cpp index 99a983ab474..2123f2a0b01 100644 --- a/lib/Transforms/InstCombine/InstCombineAndOrXor.cpp +++ b/lib/Transforms/InstCombine/InstCombineAndOrXor.cpp @@ -1775,7 +1775,7 @@ Value *InstCombiner::FoldOrOfICmps(ICmpInst *LHS, ICmpInst *RHS, if (LHS->getOperand(0) == RHS->getOperand(0)) { // if LHSC and RHSC differ only by one bit: // (A == C1 || A == C2) -> (A | (C1 ^ C2)) == C2 - assert(LHSC->getValue().ule(LHSC->getValue())); + assert(LHSC->getValue().ult(RHSC->getValue())); APInt Xor = LHSC->getValue() ^ RHSC->getValue(); if (Xor.isPowerOf2()) { -- 2.50.1