From 9c0ef542c413c898248f2d682851c6b56314673a Mon Sep 17 00:00:00 2001 From: Ahmed Bougacha Date: Fri, 6 May 2016 20:03:03 +0000 Subject: [PATCH] [X86] Accept imp-defs of GR64 super-registers in FixupBW MOVrr. Testcase will follow shortly. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268787 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/Target/X86/X86FixupBWInsts.cpp | 16 +++++++++++----- 1 file changed, 11 insertions(+), 5 deletions(-) diff --git a/lib/Target/X86/X86FixupBWInsts.cpp b/lib/Target/X86/X86FixupBWInsts.cpp index 24d78b0b776..b4b3de93e39 100644 --- a/lib/Target/X86/X86FixupBWInsts.cpp +++ b/lib/Target/X86/X86FixupBWInsts.cpp @@ -248,11 +248,17 @@ MachineInstr *FixupBWInstPass::tryReplaceCopy(MachineInstr *MI) const { BuildMI(*MF, MI->getDebugLoc(), TII->get(X86::MOV32rr), NewDestReg) .addReg(NewSrcReg); -#ifndef NDEBUG - // Make sure we didn't drop any other implicit operand. - for (auto &Op : MI->implicit_operands()) - assert(Op.getReg() == NewDestReg && "Copy imp-defs unrelated reg?"); -#endif + // Make sure we don't drop implicit operands. + // We used to imp-def the super, but we don't need to anymore, as we turned + // it into an explicit def. However, we might still need to imp-def the GR64 + // super-register. + for (auto &Op : MI->implicit_operands()) { + if (Op.getReg() == NewDestReg && Op.isDef()) + continue; + assert((!Op.isDef() || TRI->isSubRegister(Op.getReg(), NewDestReg)) && + "Copy imp-defs unrelated reg?"); + MIB.addOperand(Op); + } return MIB; } -- 2.50.1