From 9a965ff9ad955b8e1608bfc8476cf0d9bad4e63a Mon Sep 17 00:00:00 2001 From: Evandro Menezes Date: Wed, 26 Jul 2017 21:28:15 +0000 Subject: [PATCH] [AArch64] Adjust the cost model for Exynos M1 and M2 Add the information for the scalar reciprocal square root approximation. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@309183 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/Target/AArch64/AArch64SchedM1.td | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/lib/Target/AArch64/AArch64SchedM1.td b/lib/Target/AArch64/AArch64SchedM1.td index 739fbcf4472..708ccdf3d02 100644 --- a/lib/Target/AArch64/AArch64SchedM1.td +++ b/lib/Target/AArch64/AArch64SchedM1.td @@ -380,7 +380,9 @@ def : InstRW<[M1WriteFCVT3], (instregex "^FCVT[DS][DS]r")>; def : InstRW<[M1WriteNEONF], (instregex "^[FSU]CVT[AMNPZ][SU](_Int)?[SU]?[XW]?[DS]?[rds]i?")>; def : InstRW<[M1WriteNEONE], (instregex "^[SU]CVTF[SU]")>; def : InstRW<[M1WriteNALU1], (instregex "^FMOV[DS][ir]")>; -def : InstRW<[M1WriteNMISC1], (instregex "^FRECPXv")>; +def : InstRW<[M1WriteFCVT4], (instregex "^[FU](RECP|RSQRT)Ev1")>; +def : InstRW<[M1WriteNMISC1], (instregex "^FRECPXv1")>; +def : InstRW<[M1WriteFMAC5], (instregex "^F(RECP|RSQRT)S(16|32|64)")>; def : InstRW<[M1WriteS4], (instregex "^FMOV[WX][DS](High)?r")>; def : InstRW<[M1WriteNEONI], (instregex "^FMOV[DS][WX](High)?r")>; @@ -446,7 +448,7 @@ def : InstRW<[M1WriteNALU1], (instregex "^CPY")>; def : InstRW<[M1WriteNALU1], (instregex "^INSv.+lane")>; def : InstRW<[M1WriteNALU1], (instregex "^MOVI[Dv]")>; def : InstRW<[M1WriteNALU1], (instregex "^FMOVv")>; -def : InstRW<[M1WriteFCVT4], (instregex "^[FU](RECP|RSQRT)Ev")>; +def : InstRW<[M1WriteFCVT4], (instregex "^[FU](RECP|RSQRT)Ev[248]")>; def : InstRW<[M1WriteFMAC5], (instregex "^F(RECP|RSQRT)Sv")>; def : InstRW<[M1WriteNALU1], (instregex "^REV(16|32|64)v")>; def : InstRW<[M1WriteNAL11], (instregex "^TB[LX]v8i8One")>; -- 2.40.0