From 996d9b548091ab840ca2252a69f9cd83bff903a6 Mon Sep 17 00:00:00 2001 From: Craig Topper Date: Wed, 14 Jun 2017 17:04:59 +0000 Subject: [PATCH] [ValueTracking] Correct early out in computeKnownBitsFromOperator to work with non power of 2 bit widths There's an early out that's trying to detect when we don't know any bits that make up the legal range of a shift. The code subtracts one from BitWidth which creates a mask in the lower bits for power of 2 bit widths. This is then ANDed with the known bits to see if any of those bits are known. If the bit width isn't a power of 2 this creates a non-sensical mask. This patch corrects this by rounding up to a power of 2 before doing the subtract and mask. Differential Revision: https://reviews.llvm.org/D34165 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@305400 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/Analysis/ValueTracking.cpp | 3 ++- test/Transforms/InstCombine/shift.ll | 10 ++++++++++ 2 files changed, 12 insertions(+), 1 deletion(-) diff --git a/lib/Analysis/ValueTracking.cpp b/lib/Analysis/ValueTracking.cpp index 7cb8c8d8aae..b065f427b06 100644 --- a/lib/Analysis/ValueTracking.cpp +++ b/lib/Analysis/ValueTracking.cpp @@ -852,7 +852,8 @@ static void computeKnownBitsFromShiftOperator( Optional ShifterOperandIsNonZero; // Early exit if we can't constrain any well-defined shift amount. - if (!(ShiftAmtKZ & (BitWidth - 1)) && !(ShiftAmtKO & (BitWidth - 1))) { + if (!(ShiftAmtKZ & (PowerOf2Ceil(BitWidth) - 1)) && + !(ShiftAmtKO & (PowerOf2Ceil(BitWidth) - 1))) { ShifterOperandIsNonZero = isKnownNonZero(I->getOperand(1), Depth + 1, Q); if (!*ShifterOperandIsNonZero) diff --git a/test/Transforms/InstCombine/shift.ll b/test/Transforms/InstCombine/shift.ll index ce8e2fcd38b..68bbf35d1e6 100644 --- a/test/Transforms/InstCombine/shift.ll +++ b/test/Transforms/InstCombine/shift.ll @@ -1306,3 +1306,13 @@ define <2 x i8> @lshr_demanded_bits_splat(<2 x i8> %x) { ret <2 x i8> %shr } +; Make sure known bits works correctly with non power of 2 bit widths. +define i7 @test65(i7 %a, i7 %b) { +; CHECK-LABEL: @test65( +; CHECK-NEXT: ret i7 0 +; + %shiftamt = and i7 %b, 6 ; this ensures the shift amount is even and less than the bit width. + %x = lshr i7 42, %shiftamt ; 42 has a zero in every even numbered bit and a one in every odd bit. + %y = and i7 %x, 1 ; this extracts the lsb which should be 0 because we shifted an even number of bits and all even bits of the shift input are 0. + ret i7 %y +} -- 2.40.0