From 995f76732604b0527735026439ea396312e3de38 Mon Sep 17 00:00:00 2001 From: Simon Pilgrim Date: Tue, 12 Sep 2017 15:04:04 +0000 Subject: [PATCH] Fix PR34021 test on non-x86 build targets git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@313034 91177308-0d34-0410-b5e6-96231b3b80d8 --- test/CodeGen/pr34021.c | 24 ++++++++++++------------ 1 file changed, 12 insertions(+), 12 deletions(-) diff --git a/test/CodeGen/pr34021.c b/test/CodeGen/pr34021.c index c3d1b0f3d5..3c7a75a95a 100644 --- a/test/CodeGen/pr34021.c +++ b/test/CodeGen/pr34021.c @@ -5,20 +5,20 @@ typedef int v4si __attribute__ ((vector_size (16))); v4si rep() { // X86-LABEL: define <4 x i32> @rep -// X86: %retval = alloca <4 x i32>, align 16 -// X86-NEXT: %res = alloca <4 x i32>, align 16 -// X86-NEXT: %0 = bitcast <4 x i32>* %retval to i128* -// X86-NEXT: %1 = call i64 asm sideeffect inteldialect "", "=A,~{dirflag},~{fpsr},~{flags}"() -// X86-NEXT: %2 = zext i64 %1 to i128 -// X86-NEXT: store i128 %2, i128* %0, align 16 -// X86-NEXT: %3 = load <4 x i32>, <4 x i32>* %res, align 16 -// X86-NEXT: ret <4 x i32> %3 +// X86: %[[ALLOCA0:.*]] = alloca <4 x i32>, align 16 +// X86: %[[ALLOCA1:.*]] = alloca <4 x i32>, align 16 +// X86: %[[BITCAST:.*]] = bitcast <4 x i32>* %[[ALLOCA0]] to i128* +// X86: %[[ASM:.*]] = call i64 asm sideeffect inteldialect "", "=A,~{dirflag},~{fpsr},~{flags}"() +// X86: %[[ZEXT:.*]] = zext i64 %[[ASM]] to i128 +// X86: store i128 %[[ZEXT]], i128* %[[BITCAST]], align 16 +// X86: %[[LOAD:.*]] = load <4 x i32>, <4 x i32>* %[[ALLOCA1]], align 16 +// X86: ret <4 x i32> %[[LOAD]] // // X64-LABEL: define <4 x i32> @rep -// X64: %res = alloca <4 x i32>, align 16 -// X64-NEXT: call void asm sideeffect inteldialect "", "~{dirflag},~{fpsr},~{flags}"() -// X64-NEXT: %0 = load <4 x i32>, <4 x i32>* %res, align 16 -// X64-NEXT: ret <4 x i32> %0 +// X64: %[[ALLOCA:.*]] = alloca <4 x i32>, align 16 +// X64: call void asm sideeffect inteldialect "", "~{dirflag},~{fpsr},~{flags}"() +// X64: %[[LOAD:.*]] = load <4 x i32>, <4 x i32>* %[[ALLOCA]], align 16 +// X64: ret <4 x i32> %[[LOAD]] v4si res; __asm {} return res; -- 2.40.0