From 946288f92c670fd793c0644b6eadb01b768141c6 Mon Sep 17 00:00:00 2001 From: Tim Northover Date: Fri, 27 Jan 2017 21:31:24 +0000 Subject: [PATCH] GlobalISel: set correct regclass for LOAD_STACK_GUARD. Since it's not actually a generic MI, its register operands need a RegClass, which is conveniently the target's pointer RegClass. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@293335 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/CodeGen/GlobalISel/IRTranslator.cpp | 2 ++ .../AArch64/GlobalISel/arm64-irtranslator-stackprotect.ll | 2 +- 2 files changed, 3 insertions(+), 1 deletion(-) diff --git a/lib/CodeGen/GlobalISel/IRTranslator.cpp b/lib/CodeGen/GlobalISel/IRTranslator.cpp index ce3e682f14e..9382de77f88 100644 --- a/lib/CodeGen/GlobalISel/IRTranslator.cpp +++ b/lib/CodeGen/GlobalISel/IRTranslator.cpp @@ -477,6 +477,8 @@ bool IRTranslator::translateMemcpy(const CallInst &CI, void IRTranslator::getStackGuard(unsigned DstReg, MachineIRBuilder &MIRBuilder) { + const TargetRegisterInfo *TRI = MF->getSubtarget().getRegisterInfo(); + MRI->setRegClass(DstReg, TRI->getPointerRegClass(*MF)); auto MIB = MIRBuilder.buildInstr(TargetOpcode::LOAD_STACK_GUARD); MIB.addDef(DstReg); diff --git a/test/CodeGen/AArch64/GlobalISel/arm64-irtranslator-stackprotect.ll b/test/CodeGen/AArch64/GlobalISel/arm64-irtranslator-stackprotect.ll index 579ef777223..00630864118 100644 --- a/test/CodeGen/AArch64/GlobalISel/arm64-irtranslator-stackprotect.ll +++ b/test/CodeGen/AArch64/GlobalISel/arm64-irtranslator-stackprotect.ll @@ -1,4 +1,4 @@ -; RUN: llc -mtriple=aarch64-apple-ios %s -stop-after=irtranslator -o - -global-isel | FileCheck %s +; RUN: llc -verify-machineinstrs -mtriple=aarch64-apple-ios %s -stop-after=irtranslator -o - -global-isel | FileCheck %s ; CHECK: name: test_stack_guard -- 2.40.0