From 912945a78d78ddb820481c3fd1ae1b112467f6ee Mon Sep 17 00:00:00 2001 From: Craig Topper Date: Fri, 30 Jun 2017 18:14:04 +0000 Subject: [PATCH] [X86] Add RDRND feature to Goldmont. Add MOVBE to all Atom CPUs. Diffential Revision: https://reviews.llvm.org/D34842 git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@306851 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/Basic/Targets.cpp | 2 ++ test/Preprocessor/predefined-arch-macros.c | 2 ++ 2 files changed, 4 insertions(+) diff --git a/lib/Basic/Targets.cpp b/lib/Basic/Targets.cpp index 52646ae83b..e1af6415b2 100644 --- a/lib/Basic/Targets.cpp +++ b/lib/Basic/Targets.cpp @@ -3288,6 +3288,7 @@ bool X86TargetInfo::initFeatureMap( break; case CK_Goldmont: setFeatureEnabledImpl(Features, "sha", true); + setFeatureEnabledImpl(Features, "rdrnd", true); setFeatureEnabledImpl(Features, "rdseed", true); setFeatureEnabledImpl(Features, "xsave", true); setFeatureEnabledImpl(Features, "xsaveopt", true); @@ -3302,6 +3303,7 @@ bool X86TargetInfo::initFeatureMap( setFeatureEnabledImpl(Features, "sse4.2", true); LLVM_FALLTHROUGH; case CK_Bonnell: + setFeatureEnabledImpl(Features, "movbe", true); setFeatureEnabledImpl(Features, "ssse3", true); setFeatureEnabledImpl(Features, "fxsr", true); setFeatureEnabledImpl(Features, "cx16", true); diff --git a/test/Preprocessor/predefined-arch-macros.c b/test/Preprocessor/predefined-arch-macros.c index 146d005f3f..da4c5d0357 100644 --- a/test/Preprocessor/predefined-arch-macros.c +++ b/test/Preprocessor/predefined-arch-macros.c @@ -996,6 +996,7 @@ // CHECK_GLM_M32: #define __MPX__ 1 // CHECK_GLM_M32: #define __PCLMUL__ 1 // CHECK_GLM_M32: #define __POPCNT__ 1 +// CHECK_GLM_M32: #define __RDRND__ 1 // CHECK_GLM_M32: #define __RDSEED__ 1 // CHECK_GLM_M32: #define __SHA__ 1 // CHECK_GLM_M32: #define __SSE2__ 1 @@ -1034,6 +1035,7 @@ // CHECK_GLM_M64: #define __MPX__ 1 // CHECK_GLM_M64: #define __PCLMUL__ 1 // CHECK_GLM_M64: #define __POPCNT__ 1 +// CHECK_GLM_M64: #define __RDRND__ 1 // CHECK_GLM_M64: #define __RDSEED__ 1 // CHECK_GLM_M64: #define __SSE2__ 1 // CHECK_GLM_M64: #define __SSE3__ 1 -- 2.40.0