From 9030f9a6b98a3bcfe59705bb7382b87ca902740e Mon Sep 17 00:00:00 2001
From: Sanjay Patel <spatel@rotateright.com>
Date: Fri, 23 Aug 2019 21:15:27 +0000
Subject: [PATCH] [x86] add tests for bt/test; NFC

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@369812 91177308-0d34-0410-b5e6-96231b3b80d8
---
 test/CodeGen/X86/test-vs-bittest.ll | 110 ++++++++++++++++++++++++++++
 1 file changed, 110 insertions(+)

diff --git a/test/CodeGen/X86/test-vs-bittest.ll b/test/CodeGen/X86/test-vs-bittest.ll
index fa43ecb35ec..97d5709277d 100644
--- a/test/CodeGen/X86/test-vs-bittest.ll
+++ b/test/CodeGen/X86/test-vs-bittest.ll
@@ -390,4 +390,114 @@ no:
   ret void
 }
 
+define i64 @is_upper_bit_clear_i64(i64 %x) {
+; CHECK-LABEL: is_upper_bit_clear_i64:
+; CHECK:       # %bb.0:
+; CHECK-NEXT:    movq %rdi, %rax
+; CHECK-NEXT:    shrq $37, %rax
+; CHECK-NEXT:    notl %eax
+; CHECK-NEXT:    andl $1, %eax
+; CHECK-NEXT:    retq
+  %sh = lshr i64 %x, 37
+  %m = and i64 %sh, 1
+  %r = xor i64 %m, 1
+  ret i64 %r
+}
+
+define i64 @is_lower_bit_clear_i64(i64 %x) {
+; CHECK-LABEL: is_lower_bit_clear_i64:
+; CHECK:       # %bb.0:
+; CHECK-NEXT:    movq %rdi, %rax
+; CHECK-NEXT:    shrl $27, %eax
+; CHECK-NEXT:    notl %eax
+; CHECK-NEXT:    andl $1, %eax
+; CHECK-NEXT:    retq
+  %sh = lshr i64 %x, 27
+  %m = and i64 %sh, 1
+  %r = xor i64 %m, 1
+  ret i64 %r
+}
+
+define i32 @is_bit_clear_i32(i32 %x) {
+; CHECK-LABEL: is_bit_clear_i32:
+; CHECK:       # %bb.0:
+; CHECK-NEXT:    movl %edi, %eax
+; CHECK-NEXT:    shrl $27, %eax
+; CHECK-NEXT:    notl %eax
+; CHECK-NEXT:    andl $1, %eax
+; CHECK-NEXT:    retq
+  %sh = lshr i32 %x, 27
+  %n = xor i32 %sh, -1
+  %r = and i32 %n, 1
+  ret i32 %r
+}
+
+define i16 @is_bit_clear_i16(i16 %x) {
+; CHECK-LABEL: is_bit_clear_i16:
+; CHECK:       # %bb.0:
+; CHECK-NEXT:    movzwl %di, %eax
+; CHECK-NEXT:    shrl $7, %eax
+; CHECK-NEXT:    notl %eax
+; CHECK-NEXT:    andl $1, %eax
+; CHECK-NEXT:    # kill: def $ax killed $ax killed $eax
+; CHECK-NEXT:    retq
+  %sh = lshr i16 %x, 7
+  %m = and i16 %sh, 1
+  %r = xor i16 %m, 1
+  ret i16 %r
+}
+
+define i8 @is_bit_clear_i8(i8 %x) {
+; CHECK-LABEL: is_bit_clear_i8:
+; CHECK:       # %bb.0:
+; CHECK-NEXT:    movl %edi, %eax
+; CHECK-NEXT:    shrb $3, %al
+; CHECK-NEXT:    notb %al
+; CHECK-NEXT:    andb $1, %al
+; CHECK-NEXT:    # kill: def $al killed $al killed $eax
+; CHECK-NEXT:    retq
+  %sh = lshr i8 %x, 3
+  %m = and i8 %sh, 1
+  %r = xor i8 %m, 1
+  ret i8 %r
+}
+
+define i32 @setcc_is_bit_clear(i32 %x) {
+; CHECK-LABEL: setcc_is_bit_clear:
+; CHECK:       # %bb.0:
+; CHECK-NEXT:    xorl %eax, %eax
+; CHECK-NEXT:    testl $1024, %edi # imm = 0x400
+; CHECK-NEXT:    sete %al
+; CHECK-NEXT:    retq
+  %a1 = and i32 %x, 1024
+  %b1 = icmp eq i32 %a1, 0
+  %r = zext i1 %b1 to i32
+  ret i32 %r
+}
+
+define i32 @is_bit_set(i32 %x) {
+; CHECK-LABEL: is_bit_set:
+; CHECK:       # %bb.0:
+; CHECK-NEXT:    movl %edi, %eax
+; CHECK-NEXT:    shrl $10, %eax
+; CHECK-NEXT:    andl $1, %eax
+; CHECK-NEXT:    retq
+  %sh = lshr i32 %x, 10
+  %m = and i32 %sh, 1
+  ret i32 %m
+}
+
+define i32 @setcc_is_bit_set(i32 %x) {
+; CHECK-LABEL: setcc_is_bit_set:
+; CHECK:       # %bb.0:
+; CHECK-NEXT:    movl %edi, %eax
+; CHECK-NEXT:    shrl $10, %eax
+; CHECK-NEXT:    andl $1, %eax
+; CHECK-NEXT:    retq
+  %a1 = and i32 %x, 1024
+  %b1 = icmp ne i32 %a1, 0
+  %r = zext i1 %b1 to i32
+  ret i32 %r
+}
+
 declare void @bar()
-- 
2.40.0