From 8c41af6002be4a2cc3d540b0eaacb1a0c3e854f4 Mon Sep 17 00:00:00 2001 From: Craig Topper Date: Sun, 22 Jul 2018 05:16:49 +0000 Subject: [PATCH] [SelectionDAGBuilder] Restrict vector reduction check to types with a power of 2 number of elements. The check for the shuffles usages probably isn't correct for non power of 2 vectors. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@337651 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp b/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp index 73a07d56a41..59b0e625baf 100644 --- a/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp +++ b/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp @@ -2668,6 +2668,10 @@ static bool isVectorReductionOp(const User *I) { } unsigned ElemNum = Inst->getType()->getVectorNumElements(); + // Ensure the reduction size is a power of 2. + if (!isPowerOf2_32(ElemNum)) + return false; + unsigned ElemNumToReduce = ElemNum; // Do DFS search on the def-use chain from the given instruction. We only -- 2.50.1