From 87aa3050e6e6c9bc9bb75006676bd2a7f34cb6b4 Mon Sep 17 00:00:00 2001
From: Simon Pilgrim <llvm-dev@redking.me.uk>
Date: Tue, 3 Oct 2017 17:04:36 +0000
Subject: [PATCH] [X86] Add non-SSE tests for PR15215 as well

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@314815 91177308-0d34-0410-b5e6-96231b3b80d8
---
 test/CodeGen/X86/bool-vector.ll | 80 +++++++++++++++++++++++++++++++--
 1 file changed, 76 insertions(+), 4 deletions(-)

diff --git a/test/CodeGen/X86/bool-vector.ll b/test/CodeGen/X86/bool-vector.ll
index 0ee5c066be8..60f4940e2fa 100644
--- a/test/CodeGen/X86/bool-vector.ll
+++ b/test/CodeGen/X86/bool-vector.ll
@@ -1,10 +1,31 @@
 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefix=X32 --check-prefix=X32-SSE2
-; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefix=X32 --check-prefix=X32-AVX2
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefix=X64 --check-prefix=X64-SSE2
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefix=X64 --check-prefix=X64-AVX2
+; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=-sse2 | FileCheck %s --check-prefix=X32
+; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefix=X32-SSE2
+; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefix=X32-AVX2
+; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=-sse2 | FileCheck %s --check-prefix=X64
+; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefix=X64-SSE2
+; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefix=X64-AVX2
 
 define i32 @PR15215_bad(<4 x i32> %input) {
+; X32-LABEL: PR15215_bad:
+; X32:       # BB#0: # %entry
+; X32-NEXT:    movb {{[0-9]+}}(%esp), %al
+; X32-NEXT:    movb {{[0-9]+}}(%esp), %cl
+; X32-NEXT:    movb {{[0-9]+}}(%esp), %dl
+; X32-NEXT:    movb {{[0-9]+}}(%esp), %ah
+; X32-NEXT:    addb %ah, %ah
+; X32-NEXT:    andb $1, %dl
+; X32-NEXT:    orb %ah, %dl
+; X32-NEXT:    shlb $2, %dl
+; X32-NEXT:    addb %cl, %cl
+; X32-NEXT:    andb $1, %al
+; X32-NEXT:    orb %cl, %al
+; X32-NEXT:    andb $3, %al
+; X32-NEXT:    orb %dl, %al
+; X32-NEXT:    movzbl %al, %eax
+; X32-NEXT:    andl $15, %eax
+; X32-NEXT:    retl
+;
 ; X32-SSE2-LABEL: PR15215_bad:
 ; X32-SSE2:       # BB#0: # %entry
 ; X32-SSE2-NEXT:    pslld $31, %xmm0
@@ -19,6 +40,21 @@ define i32 @PR15215_bad(<4 x i32> %input) {
 ; X32-AVX2-NEXT:    vmovmskps %xmm0, %eax
 ; X32-AVX2-NEXT:    retl
 ;
+; X64-LABEL: PR15215_bad:
+; X64:       # BB#0: # %entry
+; X64-NEXT:    addb %cl, %cl
+; X64-NEXT:    andb $1, %dl
+; X64-NEXT:    orb %cl, %dl
+; X64-NEXT:    shlb $2, %dl
+; X64-NEXT:    addb %sil, %sil
+; X64-NEXT:    andb $1, %dil
+; X64-NEXT:    orb %sil, %dil
+; X64-NEXT:    andb $3, %dil
+; X64-NEXT:    orb %dl, %dil
+; X64-NEXT:    movzbl %dil, %eax
+; X64-NEXT:    andl $15, %eax
+; X64-NEXT:    retq
+;
 ; X64-SSE2-LABEL: PR15215_bad:
 ; X64-SSE2:       # BB#0: # %entry
 ; X64-SSE2-NEXT:    pslld $31, %xmm0
@@ -40,6 +76,27 @@ entry:
 }
 
 define i32 @PR15215_good(<4 x i32> %input) {
+; X32-LABEL: PR15215_good:
+; X32:       # BB#0: # %entry
+; X32-NEXT:    pushl %esi
+; X32-NEXT:  .Lcfi0:
+; X32-NEXT:    .cfi_def_cfa_offset 8
+; X32-NEXT:  .Lcfi1:
+; X32-NEXT:    .cfi_offset %esi, -8
+; X32-NEXT:    movzbl {{[0-9]+}}(%esp), %eax
+; X32-NEXT:    andl $1, %eax
+; X32-NEXT:    movzbl {{[0-9]+}}(%esp), %ecx
+; X32-NEXT:    andl $1, %ecx
+; X32-NEXT:    movzbl {{[0-9]+}}(%esp), %edx
+; X32-NEXT:    andl $1, %edx
+; X32-NEXT:    movzbl {{[0-9]+}}(%esp), %esi
+; X32-NEXT:    andl $1, %esi
+; X32-NEXT:    leal (%eax,%ecx,2), %eax
+; X32-NEXT:    leal (%eax,%edx,4), %eax
+; X32-NEXT:    leal (%eax,%esi,8), %eax
+; X32-NEXT:    popl %esi
+; X32-NEXT:    retl
+;
 ; X32-SSE2-LABEL: PR15215_good:
 ; X32-SSE2:       # BB#0: # %entry
 ; X32-SSE2-NEXT:    pushl %esi
@@ -85,6 +142,21 @@ define i32 @PR15215_good(<4 x i32> %input) {
 ; X32-AVX2-NEXT:    popl %esi
 ; X32-AVX2-NEXT:    retl
 ;
+; X64-LABEL: PR15215_good:
+; X64:       # BB#0: # %entry
+; X64-NEXT:    # kill: %ECX<def> %ECX<kill> %RCX<def>
+; X64-NEXT:    # kill: %EDX<def> %EDX<kill> %RDX<def>
+; X64-NEXT:    # kill: %ESI<def> %ESI<kill> %RSI<def>
+; X64-NEXT:    # kill: %EDI<def> %EDI<kill> %RDI<def>
+; X64-NEXT:    andl $1, %edi
+; X64-NEXT:    andl $1, %esi
+; X64-NEXT:    andl $1, %edx
+; X64-NEXT:    andl $1, %ecx
+; X64-NEXT:    leal (%rdi,%rsi,2), %eax
+; X64-NEXT:    leal (%rax,%rdx,4), %eax
+; X64-NEXT:    leal (%rax,%rcx,8), %eax
+; X64-NEXT:    retq
+;
 ; X64-SSE2-LABEL: PR15215_good:
 ; X64-SSE2:       # BB#0: # %entry
 ; X64-SSE2-NEXT:    movd %xmm0, %eax
-- 
2.50.1