From 83f786b4bac3c06ee02651bf31c59ddbb8ed32d4 Mon Sep 17 00:00:00 2001 From: Alex Bradbury Date: Wed, 13 Mar 2019 18:25:23 +0000 Subject: [PATCH] [RISCV] Regenerate test/CodeGen/RISCV/legalize-fneg.ll after rL356068 rL356068 caused some minor re-orderings. Regenerate legalize-fneg.ll to reflect this, and remove the NOLIB check lines (they're redundant given that the RV32I and RV64I check lines generated by update_llc_test_checks.py already demonstrate there is no libcall). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@356074 91177308-0d34-0410-b5e6-96231b3b80d8 --- test/CodeGen/RISCV/legalize-fneg.ll | 26 ++++---------------------- 1 file changed, 4 insertions(+), 22 deletions(-) diff --git a/test/CodeGen/RISCV/legalize-fneg.ll b/test/CodeGen/RISCV/legalize-fneg.ll index a38daaa7eeb..42440e4cb44 100644 --- a/test/CodeGen/RISCV/legalize-fneg.ll +++ b/test/CodeGen/RISCV/legalize-fneg.ll @@ -3,10 +3,6 @@ ; RUN: | FileCheck -check-prefix=RV32 %s ; RUN: llc -mtriple=riscv64 -verify-machineinstrs < %s \ ; RUN: | FileCheck -check-prefix=RV64 %s -; RUN: llc -mtriple=riscv32 -verify-machineinstrs < %s \ -; RUN: | FileCheck -check-prefix=NOLIB %s -; RUN: llc -mtriple=riscv64 -verify-machineinstrs < %s \ -; RUN: | FileCheck -check-prefix=NOLIB %s define void @test1(float* %a, float* %b) { ; RV32-LABEL: test1: @@ -25,10 +21,6 @@ define void @test1(float* %a, float* %b) { ; RV64-NEXT: xor a1, a1, a2 ; RV64-NEXT: sw a1, 0(a0) ; RV64-NEXT: ret - -; NOLIB-LABEL: test1: -; NOLIB: xor -; NOLIB-NOT: call __subsf3 entry: %0 = load float, float* %b %neg = fneg float %0 @@ -55,10 +47,6 @@ define void @test2(double* %a, double* %b) { ; RV64-NEXT: xor a1, a1, a2 ; RV64-NEXT: sd a1, 0(a0) ; RV64-NEXT: ret - -; NOLIB-LABEL: test2: -; NOLIB: xor -; NOLIB-NOT: call __subdf3 entry: %0 = load double, double* %b %neg = fneg double %0 @@ -70,12 +58,12 @@ define void @test3(fp128* %a, fp128* %b) { ; RV32-LABEL: test3: ; RV32: # %bb.0: # %entry ; RV32-NEXT: lw a2, 12(a1) -; RV32-NEXT: lw a3, 0(a1) -; RV32-NEXT: lw a4, 4(a1) +; RV32-NEXT: lw a3, 4(a1) +; RV32-NEXT: lw a4, 0(a1) ; RV32-NEXT: lw a1, 8(a1) ; RV32-NEXT: sw a1, 8(a0) -; RV32-NEXT: sw a4, 4(a0) -; RV32-NEXT: sw a3, 0(a0) +; RV32-NEXT: sw a4, 0(a0) +; RV32-NEXT: sw a3, 4(a0) ; RV32-NEXT: lui a1, 524288 ; RV32-NEXT: xor a1, a2, a1 ; RV32-NEXT: sw a1, 12(a0) @@ -91,15 +79,9 @@ define void @test3(fp128* %a, fp128* %b) { ; RV64-NEXT: xor a1, a2, a1 ; RV64-NEXT: sd a1, 8(a0) ; RV64-NEXT: ret - -; NOLIB-LABEL: test3: -; NOLIB: xor -; NOLIB-NOT: call __subtf3 entry: %0 = load fp128, fp128* %b %neg = fneg fp128 %0 store fp128 %neg, fp128* %a ret void } - - -- 2.40.0