From 80bfe66e42a521b5f14ad4226a2018c07211f7a2 Mon Sep 17 00:00:00 2001 From: Craig Topper Date: Tue, 4 Apr 2017 19:31:21 +0000 Subject: [PATCH] [InstCombine] Add test cases for missing combines of phis with and/or/xor with constant argument. NFC git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@299460 91177308-0d34-0410-b5e6-96231b3b80d8 --- test/Transforms/InstCombine/and.ll | 68 ++++++++++++++++++++++++++++++ test/Transforms/InstCombine/or.ll | 68 ++++++++++++++++++++++++++++++ test/Transforms/InstCombine/xor.ll | 68 ++++++++++++++++++++++++++++++ 3 files changed, 204 insertions(+) diff --git a/test/Transforms/InstCombine/and.ll b/test/Transforms/InstCombine/and.ll index 9a23342feb1..34285a2a657 100644 --- a/test/Transforms/InstCombine/and.ll +++ b/test/Transforms/InstCombine/and.ll @@ -525,3 +525,71 @@ define <2 x i32> @test40vec2(i1 %C) { %V = and <2 x i32> %A, ret <2 x i32> %V } + +define i32 @test41(i1 %which) { +; CHECK-LABEL: @test41( +; CHECK-NEXT: entry: +; CHECK-NEXT: br i1 [[WHICH:%.*]], label [[FINAL:%.*]], label [[DELAY:%.*]] +; CHECK: delay: +; CHECK-NEXT: br label [[FINAL]] +; CHECK: final: +; CHECK-NEXT: [[A:%.*]] = phi i32 [ 104, [[ENTRY:%.*]] ], [ 10, [[DELAY]] ] +; CHECK-NEXT: ret i32 [[A]] +; +entry: + br i1 %which, label %final, label %delay + +delay: + br label %final + +final: + %A = phi i32 [ 1000, %entry ], [ 10, %delay ] + %value = and i32 %A, 123 + ret i32 %value +} + +define <2 x i32> @test41vec(i1 %which) { +; CHECK-LABEL: @test41vec( +; CHECK-NEXT: entry: +; CHECK-NEXT: br i1 [[WHICH:%.*]], label [[FINAL:%.*]], label [[DELAY:%.*]] +; CHECK: delay: +; CHECK-NEXT: br label [[FINAL]] +; CHECK: final: +; CHECK-NEXT: [[A:%.*]] = phi <2 x i32> [ , [[ENTRY:%.*]] ], [ , [[DELAY]] ] +; CHECK-NEXT: [[VALUE:%.*]] = and <2 x i32> [[A]], +; CHECK-NEXT: ret <2 x i32> [[VALUE]] +; +entry: + br i1 %which, label %final, label %delay + +delay: + br label %final + +final: + %A = phi <2 x i32> [ , %entry ], [ , %delay ] + %value = and <2 x i32> %A, + ret <2 x i32> %value +} + +define <2 x i32> @test41vec2(i1 %which) { +; CHECK-LABEL: @test41vec2( +; CHECK-NEXT: entry: +; CHECK-NEXT: br i1 [[WHICH:%.*]], label [[FINAL:%.*]], label [[DELAY:%.*]] +; CHECK: delay: +; CHECK-NEXT: br label [[FINAL]] +; CHECK: final: +; CHECK-NEXT: [[A:%.*]] = phi <2 x i32> [ , [[ENTRY:%.*]] ], [ , [[DELAY]] ] +; CHECK-NEXT: [[VALUE:%.*]] = and <2 x i32> [[A]], +; CHECK-NEXT: ret <2 x i32> [[VALUE]] +; +entry: + br i1 %which, label %final, label %delay + +delay: + br label %final + +final: + %A = phi <2 x i32> [ , %entry ], [ , %delay ] + %value = and <2 x i32> %A, + ret <2 x i32> %value +} diff --git a/test/Transforms/InstCombine/or.ll b/test/Transforms/InstCombine/or.ll index 24431095b36..ded9ad8354e 100644 --- a/test/Transforms/InstCombine/or.ll +++ b/test/Transforms/InstCombine/or.ll @@ -733,3 +733,71 @@ define <2 x i32> @test49vec2(i1 %C) { %V = or <2 x i32> %A, ret <2 x i32> %V } + +define i32 @test50(i1 %which) { +; CHECK-LABEL: @test50( +; CHECK-NEXT: entry: +; CHECK-NEXT: br i1 [[WHICH:%.*]], label [[FINAL:%.*]], label [[DELAY:%.*]] +; CHECK: delay: +; CHECK-NEXT: br label [[FINAL]] +; CHECK: final: +; CHECK-NEXT: [[A:%.*]] = phi i32 [ 1019, [[ENTRY:%.*]] ], [ 123, [[DELAY]] ] +; CHECK-NEXT: ret i32 [[A]] +; +entry: + br i1 %which, label %final, label %delay + +delay: + br label %final + +final: + %A = phi i32 [ 1000, %entry ], [ 10, %delay ] + %value = or i32 %A, 123 + ret i32 %value +} + +define <2 x i32> @test50vec(i1 %which) { +; CHECK-LABEL: @test50vec( +; CHECK-NEXT: entry: +; CHECK-NEXT: br i1 [[WHICH:%.*]], label [[FINAL:%.*]], label [[DELAY:%.*]] +; CHECK: delay: +; CHECK-NEXT: br label [[FINAL]] +; CHECK: final: +; CHECK-NEXT: [[A:%.*]] = phi <2 x i32> [ , [[ENTRY:%.*]] ], [ , [[DELAY]] ] +; CHECK-NEXT: [[VALUE:%.*]] = or <2 x i32> [[A]], +; CHECK-NEXT: ret <2 x i32> [[VALUE]] +; +entry: + br i1 %which, label %final, label %delay + +delay: + br label %final + +final: + %A = phi <2 x i32> [ , %entry ], [ , %delay ] + %value = or <2 x i32> %A, + ret <2 x i32> %value +} + +define <2 x i32> @test50vec2(i1 %which) { +; CHECK-LABEL: @test50vec2( +; CHECK-NEXT: entry: +; CHECK-NEXT: br i1 [[WHICH:%.*]], label [[FINAL:%.*]], label [[DELAY:%.*]] +; CHECK: delay: +; CHECK-NEXT: br label [[FINAL]] +; CHECK: final: +; CHECK-NEXT: [[A:%.*]] = phi <2 x i32> [ , [[ENTRY:%.*]] ], [ , [[DELAY]] ] +; CHECK-NEXT: [[VALUE:%.*]] = or <2 x i32> [[A]], +; CHECK-NEXT: ret <2 x i32> [[VALUE]] +; +entry: + br i1 %which, label %final, label %delay + +delay: + br label %final + +final: + %A = phi <2 x i32> [ , %entry ], [ , %delay ] + %value = or <2 x i32> %A, + ret <2 x i32> %value +} diff --git a/test/Transforms/InstCombine/xor.ll b/test/Transforms/InstCombine/xor.ll index 444dfd1d29f..699c1994be1 100644 --- a/test/Transforms/InstCombine/xor.ll +++ b/test/Transforms/InstCombine/xor.ll @@ -384,3 +384,71 @@ define <2 x i32> @test29vec2(i1 %C) { %V = xor <2 x i32> %A, ret <2 x i32> %V } + +define i32 @test30(i1 %which) { +; CHECK-LABEL: @test30( +; CHECK-NEXT: entry: +; CHECK-NEXT: br i1 [[WHICH:%.*]], label [[FINAL:%.*]], label [[DELAY:%.*]] +; CHECK: delay: +; CHECK-NEXT: br label [[FINAL]] +; CHECK: final: +; CHECK-NEXT: [[A:%.*]] = phi i32 [ 915, [[ENTRY:%.*]] ], [ 113, [[DELAY]] ] +; CHECK-NEXT: ret i32 [[A]] +; +entry: + br i1 %which, label %final, label %delay + +delay: + br label %final + +final: + %A = phi i32 [ 1000, %entry ], [ 10, %delay ] + %value = xor i32 %A, 123 + ret i32 %value +} + +define <2 x i32> @test30vec(i1 %which) { +; CHECK-LABEL: @test30vec( +; CHECK-NEXT: entry: +; CHECK-NEXT: br i1 [[WHICH:%.*]], label [[FINAL:%.*]], label [[DELAY:%.*]] +; CHECK: delay: +; CHECK-NEXT: br label [[FINAL]] +; CHECK: final: +; CHECK-NEXT: [[A:%.*]] = phi <2 x i32> [ , [[ENTRY:%.*]] ], [ , [[DELAY]] ] +; CHECK-NEXT: [[VALUE:%.*]] = xor <2 x i32> [[A]], +; CHECK-NEXT: ret <2 x i32> [[VALUE]] +; +entry: + br i1 %which, label %final, label %delay + +delay: + br label %final + +final: + %A = phi <2 x i32> [ , %entry ], [ , %delay ] + %value = xor <2 x i32> %A, + ret <2 x i32> %value +} + +define <2 x i32> @test30vec2(i1 %which) { +; CHECK-LABEL: @test30vec2( +; CHECK-NEXT: entry: +; CHECK-NEXT: br i1 [[WHICH:%.*]], label [[FINAL:%.*]], label [[DELAY:%.*]] +; CHECK: delay: +; CHECK-NEXT: br label [[FINAL]] +; CHECK: final: +; CHECK-NEXT: [[A:%.*]] = phi <2 x i32> [ , [[ENTRY:%.*]] ], [ , [[DELAY]] ] +; CHECK-NEXT: [[VALUE:%.*]] = xor <2 x i32> [[A]], +; CHECK-NEXT: ret <2 x i32> [[VALUE]] +; +entry: + br i1 %which, label %final, label %delay + +delay: + br label %final + +final: + %A = phi <2 x i32> [ , %entry ], [ , %delay ] + %value = xor <2 x i32> %A, + ret <2 x i32> %value +} -- 2.50.1