From 7e9afd4946f5b68a80e549139b2d2d1d42f01687 Mon Sep 17 00:00:00 2001 From: Stephen Canon Date: Thu, 19 Jul 2018 22:46:42 +0000 Subject: [PATCH] Skip out of SimplifyDemandedBits for BITCAST of f16 to i16 Mirrors the existing exit path for f128, avoiding a crash later on. Differential Revision: https://reviews.llvm.org/D49524 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@337506 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/CodeGen/SelectionDAG/TargetLowering.cpp | 1 + test/CodeGen/X86/pr38038.ll | 10 ++++++++++ 2 files changed, 11 insertions(+) create mode 100644 test/CodeGen/X86/pr38038.ll diff --git a/lib/CodeGen/SelectionDAG/TargetLowering.cpp b/lib/CodeGen/SelectionDAG/TargetLowering.cpp index fbe74f27b8f..4c885f90363 100644 --- a/lib/CodeGen/SelectionDAG/TargetLowering.cpp +++ b/lib/CodeGen/SelectionDAG/TargetLowering.cpp @@ -1187,6 +1187,7 @@ bool TargetLowering::SimplifyDemandedBits(SDValue Op, bool OpVTLegal = isOperationLegalOrCustom(ISD::FGETSIGN, VT); bool i32Legal = isOperationLegalOrCustom(ISD::FGETSIGN, MVT::i32); if ((OpVTLegal || i32Legal) && VT.isSimple() && + Op.getOperand(0).getValueType() != MVT::f16 && Op.getOperand(0).getValueType() != MVT::f128) { // Cannot eliminate/lower SHL for f128 yet. EVT Ty = OpVTLegal ? VT : MVT::i32; diff --git a/test/CodeGen/X86/pr38038.ll b/test/CodeGen/X86/pr38038.ll new file mode 100644 index 00000000000..42ade7c5a76 --- /dev/null +++ b/test/CodeGen/X86/pr38038.ll @@ -0,0 +1,10 @@ +; RUN: llc < %s +; PR38038 + +define i8 @crash(half) { +entry: + %1 = bitcast half %0 to i16 + %.lobit = lshr i16 %1, 15 + %2 = trunc i16 %.lobit to i8 + ret i8 %2 +} -- 2.50.1