From 7ca35760c51f2d4dbbb66e9c947c9c1bcb2b9381 Mon Sep 17 00:00:00 2001 From: Nicolai Haehnle Date: Tue, 27 Jun 2017 08:04:13 +0000 Subject: [PATCH] AMDGPU: M0 operands to spill/restore opcodes are dead Summary: With scalar stores, M0 is clobbered and therefore marked as implicitly defined. However, it is also dead. This fixes an assertion when the Greedy Register Allocator decides to optimize a spill/restore pair away again (via tryHintsRecoloring). Reviewers: arsenm Subscribers: qcolombet, kzhuravl, wdng, yaxunl, dstuttard, tpr, t-tye, llvm-commits Differential Revision: https://reviews.llvm.org/D33319 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306375 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/Target/AMDGPU/SIInstrInfo.cpp | 4 ++-- test/CodeGen/AMDGPU/spill-to-smem-m0.ll | 22 ++++++++++++++++++++++ 2 files changed, 24 insertions(+), 2 deletions(-) create mode 100644 test/CodeGen/AMDGPU/spill-to-smem-m0.ll diff --git a/lib/Target/AMDGPU/SIInstrInfo.cpp b/lib/Target/AMDGPU/SIInstrInfo.cpp index c9b48fea722..4dd0d5b2199 100644 --- a/lib/Target/AMDGPU/SIInstrInfo.cpp +++ b/lib/Target/AMDGPU/SIInstrInfo.cpp @@ -770,7 +770,7 @@ void SIInstrInfo::storeRegToStackSlot(MachineBasicBlock &MBB, if (ST.hasScalarStores()) { // m0 is used for offset to scalar stores if used to spill. - Spill.addReg(AMDGPU::M0, RegState::ImplicitDefine); + Spill.addReg(AMDGPU::M0, RegState::ImplicitDefine | RegState::Dead); } return; @@ -871,7 +871,7 @@ void SIInstrInfo::loadRegFromStackSlot(MachineBasicBlock &MBB, if (ST.hasScalarStores()) { // m0 is used for offset to scalar stores if used to spill. - Spill.addReg(AMDGPU::M0, RegState::ImplicitDefine); + Spill.addReg(AMDGPU::M0, RegState::ImplicitDefine | RegState::Dead); } return; diff --git a/test/CodeGen/AMDGPU/spill-to-smem-m0.ll b/test/CodeGen/AMDGPU/spill-to-smem-m0.ll new file mode 100644 index 00000000000..c6691e7bb2f --- /dev/null +++ b/test/CodeGen/AMDGPU/spill-to-smem-m0.ll @@ -0,0 +1,22 @@ +; RUN: llc -O0 -march=amdgcn -mcpu=fiji -amdgpu-spill-sgpr-to-smem=1 -verify-machineinstrs -stop-before=prologepilog < %s + +; Spill to SMEM clobbers M0. Check that the implicit-def dead operand is present +; in the pseudo instructions. + +; CHECK-LABEL: {{^}}spill_sgpr: +; CHECK: SI_SPILL_S32_SAVE {{.*}}, implicit-def dead %m0 +; CHECK: SI_SPILL_S32_RESTORE {{.*}}, implicit-def dead %m0 +define amdgpu_kernel void @spill_sgpr(i32 addrspace(1)* %out, i32 %in) #0 { + %sgpr = call i32 asm sideeffect "; def $0", "=s" () #0 + %cmp = icmp eq i32 %in, 0 + br i1 %cmp, label %bb0, label %ret + +bb0: + call void asm sideeffect "; use $0", "s"(i32 %sgpr) #0 + br label %ret + +ret: + ret void +} + +attributes #0 = { nounwind } -- 2.50.1