From 79a4de8436af04936268d60119450cc05f75eb36 Mon Sep 17 00:00:00 2001
From: Daniel Jasper <djasper@google.com>
Date: Mon, 10 Oct 2016 11:40:28 +0000
Subject: [PATCH] Revert "[x86][inline-asm][clang] accept 'v' constraint"

This reverts commit r283716.

Breaks buildbot:
http://lab.llvm.org:8080/green/job/clang-stage2-configure-Rlto_check/9155/testReport/junit/Clang/CodeGen/x86_inline_asm_v_constraint_c/

git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@283743 91177308-0d34-0410-b5e6-96231b3b80d8
---
 lib/Basic/Targets.cpp                      |  2 --
 test/CodeGen/x86-inline-asm-v-constraint.c | 30 ----------------------
 2 files changed, 32 deletions(-)
 delete mode 100644 test/CodeGen/x86-inline-asm-v-constraint.c

diff --git a/lib/Basic/Targets.cpp b/lib/Basic/Targets.cpp
index 5a585981fb..52dd91bce0 100644
--- a/lib/Basic/Targets.cpp
+++ b/lib/Basic/Targets.cpp
@@ -4005,7 +4005,6 @@ X86TargetInfo::validateAsmConstraint(const char *&Name,
   case 'u': // Second from top of floating point stack.
   case 'q': // Any register accessible as [r]l: a, b, c, and d.
   case 'y': // Any MMX register.
-  case 'v': // Any {X,Y,Z}MM register (Arch & context dependent)
   case 'x': // Any SSE register.
   case 'Q': // Any register accessible as [r]h: a, b, c, and d.
   case 'R': // "Legacy" registers: ax, bx, cx, dx, di, si, sp, bp.
@@ -4046,7 +4045,6 @@ bool X86TargetInfo::validateOperandSize(StringRef Constraint,
   case 't':
   case 'u':
     return Size <= 128;
-  case 'v':
   case 'x':
     if (SSELevel >= AVX512F)
       // 512-bit zmm registers can be used if target supports AVX512F.
diff --git a/test/CodeGen/x86-inline-asm-v-constraint.c b/test/CodeGen/x86-inline-asm-v-constraint.c
deleted file mode 100644
index cce95514c3..0000000000
--- a/test/CodeGen/x86-inline-asm-v-constraint.c
+++ /dev/null
@@ -1,30 +0,0 @@
-// RUN: %clang_cc1 %s -triple x86_64-unknown-linux-gnu -emit-llvm -target-cpu x86-64 -o - | FileCheck %s --check-prefix SSE
-// RUN: %clang_cc1 %s -triple x86_64-unknown-linux-gnu -emit-llvm -target-cpu skylake -D AVX -o - | FileCheck %s --check-prefixes AVX,SSE
-// RUN: %clang_cc1 %s -triple x86_64-unknown-linux-gnu -emit-llvm -target-cpu skylake-avx512 -D AVX512 -D AVX -o - | FileCheck %s --check-prefixes AVX512,AVX,SSE
-// RUN: %clang_cc1 %s -triple x86_64-unknown-linux-gnu -emit-llvm -target-cpu knl -D AVX -D AVX512 -o - | FileCheck %s --check-prefixes AVX512,AVX,SSE
-
-typedef float __m128 __attribute__ ((vector_size (16)));
-typedef float __m256 __attribute__ ((vector_size (32)));
-typedef float __m512 __attribute__ ((vector_size (64)));
-
-// SSE: call <4 x float> asm "vmovhlps $1, $2, $0", "=v,v,v,~{dirflag},~{fpsr},~{flags}"(i64 %0, <4 x float> %1)
-__m128 testXMM(__m128 _xmm0, long _l) {
-  __asm__("vmovhlps %1, %2, %0" :"=v"(_xmm0) : "v"(_l), "v"(_xmm0));
-  return _xmm0;
-}
-
-// AVX: call <8 x float> asm "vmovsldup $1, $0", "=v,v,~{dirflag},~{fpsr},~{flags}"(<8 x float> %0)
-__m256 testYMM(__m256 _ymm0) {
-#ifdef AVX
-  __asm__("vmovsldup %1, %0" :"=v"(_ymm0) : "v"(_ymm0));
-#endif
-  return _ymm0;
-}
-
-// AVX512: call <16 x float> asm "vpternlogd $$0, $1, $2, $0", "=v,v,v,~{dirflag},~{fpsr},~{flags}"(<16 x float> %0, <16 x float> %1)
-__m512 testZMM(__m512 _zmm0, __m512 _zmm1) {
-#ifdef AVX512
-  __asm__("vpternlogd $0, %1, %2, %0" :"=v"(_zmm0) : "v"(_zmm1), "v"(_zmm0));
-#endif
-  return _zmm0;
-}
-- 
2.40.0