From 759fd6ca165cac76bb8789eb5241de7ac111b4ab Mon Sep 17 00:00:00 2001 From: Thomas Lively Date: Fri, 1 Mar 2019 01:38:54 +0000 Subject: [PATCH] [WebAssembly] Lower SIMD shifts since they are fixed in V8 Reviewers: sbc100 Subscribers: dschuff, jgravelle-google, hiraditya, aheejin, sunfish, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D58800 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@355163 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/Target/WebAssembly/WebAssemblyISelLowering.cpp | 5 ----- 1 file changed, 5 deletions(-) diff --git a/lib/Target/WebAssembly/WebAssemblyISelLowering.cpp b/lib/Target/WebAssembly/WebAssemblyISelLowering.cpp index 50bd5a94f4b..4255e0eb158 100644 --- a/lib/Target/WebAssembly/WebAssemblyISelLowering.cpp +++ b/lib/Target/WebAssembly/WebAssemblyISelLowering.cpp @@ -1291,11 +1291,6 @@ SDValue WebAssemblyTargetLowering::LowerShift(SDValue Op, // Only manually lower vector shifts assert(Op.getSimpleValueType().isVector()); - // Expand all vector shifts until V8 fixes its implementation - // TODO: remove this once V8 is fixed - if (!Subtarget->hasUnimplementedSIMD128()) - return unrollVectorShift(Op, DAG); - // Unroll non-splat vector shifts BuildVectorSDNode *ShiftVec; SDValue SplatVal; -- 2.50.1