From 735eff80dd17c3f5f7959d7802988e5bf50fc673 Mon Sep 17 00:00:00 2001
From: Diana Picus <diana.picus@linaro.org>
Date: Wed, 10 Apr 2019 09:14:16 +0000
Subject: [PATCH] [ARM GlobalISel] Map G_FCONSTANT

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@358061 91177308-0d34-0410-b5e6-96231b3b80d8
---
 lib/Target/ARM/ARMRegisterBankInfo.cpp        |  8 ++++
 .../ARM/GlobalISel/arm-regbankselect.mir      | 39 +++++++++++++++++++
 2 files changed, 47 insertions(+)

diff --git a/lib/Target/ARM/ARMRegisterBankInfo.cpp b/lib/Target/ARM/ARMRegisterBankInfo.cpp
index f56f517bc98..021c13115e3 100644
--- a/lib/Target/ARM/ARMRegisterBankInfo.cpp
+++ b/lib/Target/ARM/ARMRegisterBankInfo.cpp
@@ -336,6 +336,14 @@ ARMRegisterBankInfo::getInstrMapping(const MachineInstr &MI) const {
                                     &ARM::ValueMappings[ARM::GPR3OpsIdx]});
     break;
   }
+  case G_FCONSTANT: {
+    LLT Ty = MRI.getType(MI.getOperand(0).getReg());
+    OperandsMapping = getOperandsMapping(
+        {Ty.getSizeInBits() == 64 ? &ARM::ValueMappings[ARM::DPR3OpsIdx]
+                                  : &ARM::ValueMappings[ARM::SPR3OpsIdx],
+         nullptr});
+    break;
+  }
   case G_CONSTANT:
   case G_FRAME_INDEX:
   case G_GLOBAL_VALUE:
diff --git a/test/CodeGen/ARM/GlobalISel/arm-regbankselect.mir b/test/CodeGen/ARM/GlobalISel/arm-regbankselect.mir
index 42877d857e0..6b24fda441a 100644
--- a/test/CodeGen/ARM/GlobalISel/arm-regbankselect.mir
+++ b/test/CodeGen/ARM/GlobalISel/arm-regbankselect.mir
@@ -71,6 +71,9 @@
   define void @test_fpext_s32_to_s64() #0 { ret void }
   define void @test_fptrunc_s64_to_s32() #0 { ret void }
 
+  define void @test_fpconst_s32() #0 { ret void }
+  define void @test_fpconst_s64() #0 { ret void }
+
   define void @test_fptosi_s32() #0 { ret void }
   define void @test_fptosi_s64() #0 { ret void }
   define void @test_fptoui_s32() #0 { ret void }
@@ -1287,6 +1290,42 @@ body:             |
     BX_RET 14, $noreg, implicit $s0
 ...
 ---
+name:            test_fpconst_s32
+# CHECK-LABEL: name: test_fpconst_s32
+legalized:       true
+regBankSelected: false
+selected:        false
+# CHECK: registers:
+# CHECK: - { id: 0, class: fprb, preferred-register: '' }
+registers:
+  - { id: 0, class: _ }
+body:             |
+  bb.0:
+    liveins:
+
+    %0(s32) = G_FCONSTANT float -1.25
+    $s0 = COPY %0(s32)
+    BX_RET 14, $noreg, implicit $s0
+...
+---
+name:            test_fpconst_s64
+# CHECK-LABEL: name: test_fpconst_s64
+legalized:       true
+regBankSelected: false
+selected:        false
+# CHECK: registers:
+# CHECK: - { id: 0, class: fprb, preferred-register: '' }
+registers:
+  - { id: 0, class: _ }
+body:             |
+  bb.0:
+    liveins:
+
+    %0(s64) = G_FCONSTANT double -2.4
+    $d0 = COPY %0(s64)
+    BX_RET 14, $noreg, implicit $d0
+...
+---
 name:            test_fptosi_s32
 # CHECK-LABEL: name: test_fptosi_s32
 legalized:       true
-- 
2.50.1