From 72dab34b83543aebf6661a1c4536ad0806b5b878 Mon Sep 17 00:00:00 2001
From: Matt Arsenault <Matthew.Arsenault@amd.com>
Date: Mon, 7 Nov 2016 16:52:50 +0000
Subject: [PATCH] AMDGPU: Try to fix (non-clang?) bot builds

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@286120 91177308-0d34-0410-b5e6-96231b3b80d8
---
 lib/Target/AMDGPU/SIRegisterInfo.cpp | 20 ++++++++++----------
 1 file changed, 10 insertions(+), 10 deletions(-)

diff --git a/lib/Target/AMDGPU/SIRegisterInfo.cpp b/lib/Target/AMDGPU/SIRegisterInfo.cpp
index e975f5a5341..2a093fff20f 100644
--- a/lib/Target/AMDGPU/SIRegisterInfo.cpp
+++ b/lib/Target/AMDGPU/SIRegisterInfo.cpp
@@ -1200,15 +1200,15 @@ ArrayRef<int16_t> SIRegisterInfo::getRegSplitParts(const TargetRegisterClass *RC
     case 32:
       return {};
     case 64:
-      return Sub0_1;
+      return makeArrayRef(Sub0_1);
     case 96:
-      return Sub0_2;
+      return makeArrayRef(Sub0_2);
     case 128:
-      return Sub0_3;
+      return makeArrayRef(Sub0_3);
     case 256:
-      return Sub0_7;
+      return makeArrayRef(Sub0_7);
     case 512:
-      return Sub0_15;
+      return makeArrayRef(Sub0_15);
     default:
       llvm_unreachable("unhandled register size");
     }
@@ -1236,11 +1236,11 @@ ArrayRef<int16_t> SIRegisterInfo::getRegSplitParts(const TargetRegisterClass *RC
     case 64:
       return {};
     case 128:
-      return Sub0_3_64;
+      return makeArrayRef(Sub0_3_64);
     case 256:
-      return Sub0_7_64;
+      return makeArrayRef(Sub0_7_64);
     case 512:
-      return Sub0_15_64;
+      return makeArrayRef(Sub0_15_64);
     default:
       llvm_unreachable("unhandled register size");
     }
@@ -1264,9 +1264,9 @@ ArrayRef<int16_t> SIRegisterInfo::getRegSplitParts(const TargetRegisterClass *RC
   case 128:
     return {};
   case 256:
-    return Sub0_7_128;
+    return makeArrayRef(Sub0_7_128);
   case 512:
-    return Sub0_15_128;
+    return makeArrayRef(Sub0_15_128);
   default:
     llvm_unreachable("unhandled register size");
   }
-- 
2.40.0