From 707116e84d47494ef9923f074c3bed77c573a2b2 Mon Sep 17 00:00:00 2001 From: Amara Emerson Date: Wed, 4 Sep 2019 07:58:45 +0000 Subject: [PATCH] [GlobalISel] Fix G_SEXT narrowScalar to bail out of unsupported type combination. Similar to the issue with G_ZEXT that was fixed earlier, this is a quick to fall back if the source type is not exactly half of the dest type. Fixes the clang-cmake-aarch64-lld bot build. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@370847 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/CodeGen/GlobalISel/LegalizerHelper.cpp | 10 +++++++--- 1 file changed, 7 insertions(+), 3 deletions(-) diff --git a/lib/CodeGen/GlobalISel/LegalizerHelper.cpp b/lib/CodeGen/GlobalISel/LegalizerHelper.cpp index abbab01303b..6bb65642956 100644 --- a/lib/CodeGen/GlobalISel/LegalizerHelper.cpp +++ b/lib/CodeGen/GlobalISel/LegalizerHelper.cpp @@ -619,13 +619,17 @@ LegalizerHelper::LegalizeResult LegalizerHelper::narrowScalar(MachineInstr &MI, if (TypeIdx != 0) return UnableToLegalize; - if (NarrowTy.getSizeInBits() != SizeOp0 / 2) { + Register SrcReg = MI.getOperand(1).getReg(); + LLT SrcTy = MRI.getType(SrcReg); + + // FIXME: support the general case where the requested NarrowTy may not be + // the same as the source type. E.g. s128 = sext(s32) + if ((SrcTy.getSizeInBits() != SizeOp0 / 2) || + SrcTy.getSizeInBits() != NarrowTy.getSizeInBits()) { LLVM_DEBUG(dbgs() << "Can't narrow sext to type " << NarrowTy << "\n"); return UnableToLegalize; } - Register SrcReg = MI.getOperand(1).getReg(); - // Shift the sign bit of the low register through the high register. auto ShiftAmt = MIRBuilder.buildConstant(LLT::scalar(64), NarrowTy.getSizeInBits() - 1); -- 2.50.1