From 6ed2a84aabdcfceb7a41e557fd5819abb21024ed Mon Sep 17 00:00:00 2001 From: Eugene Syromyatnikov Date: Sat, 3 Sep 2016 14:44:48 +0300 Subject: [PATCH] Implement decoding of perf_event_attr structure in perf_event_open syscall * linux/perf_event_struct.h: New file, definition of struct perf_event_attr from Linux 4.8 * Makefile.am (strace_SOURCES): Add it. * xlat/hw_breakpoint_len.in: New file. * xlat/hw_breakpoint_type.in: Likewise. * xlat/perf_attr_size.in: Likewise. * xlat/perf_branch_sample_type.in: Likewise. * xlat/perf_event_read_format.in: Likewise. * xlat/perf_event_sample_format.in: Likewise. * xlat/perf_hw_cache_id.in: Likewise. * xlat/perf_hw_cache_op_id.in: Likewise. * xlat/perf_hw_cache_op_result_id.in: Likewise. * xlat/perf_hw_id.in: Likewise. * xlat/perf_sw_ids.in: Likewise. * xlat/perf_type_id.in: Likewise. * perf.c [HAVE_LINUX_PERF_EVENT_H]: Remove inclusion of . (PRINT_XLAT): New macro for simplifying printing values from sorted xlat. (printxlat_search): New function, wrapper for xlat_search with behaviour similar to printval. (print_perf_event_attr): New print_event_attr structure fetching and printing function. (SYS_FUNC(perf_event_open)): Use print_perf_event_attr for displaying attr argument contents. * tests/perf_event_open.c: Renamed to tests/perf_event_open_nonverbose.c. * tests/perf_event_open.test: add -e verbose=none in order to preserve output format being checked (in case verbose output is enabled, contents of attr arguments are shown now); rename to tests/perf_event_open_nonverbose.test; add -e trace=perf_event_open. --- Makefile.am | 1 + perf.c | 390 +++++++++++++++++- perf_event_struct.h | 73 ++++ tests/.gitignore | 2 +- tests/Makefile.am | 4 +- ...nt_open.c => perf_event_open_nonverbose.c} | 0 ...n.test => perf_event_open_nonverbose.test} | 2 +- xlat/hw_breakpoint_len.in | 4 + xlat/hw_breakpoint_type.in | 6 + xlat/perf_attr_size.in | 6 + xlat/perf_branch_sample_type.in | 16 + xlat/perf_event_read_format.in | 4 + xlat/perf_event_sample_format.in | 19 + xlat/perf_hw_cache_id.in | 8 + xlat/perf_hw_cache_op_id.in | 4 + xlat/perf_hw_cache_op_result_id.in | 3 + xlat/perf_hw_id.in | 11 + xlat/perf_sw_ids.in | 12 + xlat/perf_type_id.in | 7 + 19 files changed, 564 insertions(+), 8 deletions(-) create mode 100644 perf_event_struct.h rename tests/{perf_event_open.c => perf_event_open_nonverbose.c} (100%) rename tests/{perf_event_open.test => perf_event_open_nonverbose.test} (54%) create mode 100644 xlat/hw_breakpoint_len.in create mode 100644 xlat/hw_breakpoint_type.in create mode 100644 xlat/perf_attr_size.in create mode 100644 xlat/perf_branch_sample_type.in create mode 100644 xlat/perf_event_read_format.in create mode 100644 xlat/perf_event_sample_format.in create mode 100644 xlat/perf_hw_cache_id.in create mode 100644 xlat/perf_hw_cache_op_id.in create mode 100644 xlat/perf_hw_cache_op_result_id.in create mode 100644 xlat/perf_hw_id.in create mode 100644 xlat/perf_sw_ids.in create mode 100644 xlat/perf_type_id.in diff --git a/Makefile.am b/Makefile.am index d1ad1fec..1c7fd20c 100644 --- a/Makefile.am +++ b/Makefile.am @@ -172,6 +172,7 @@ strace_SOURCES = \ or1k_atomic.c \ pathtrace.c \ perf.c \ + perf_event_struct.h \ personality.c \ poll.c \ prctl.c \ diff --git a/perf.c b/perf.c index 8ab58a0e..38cd921a 100644 --- a/perf.c +++ b/perf.c @@ -1,6 +1,7 @@ /* * Copyright (c) 2013 Ben Noordhuis * Copyright (c) 2013-2015 Dmitry V. Levin + * Copyright (c) 2016 Eugene Syromyatnikov * All rights reserved. * * Redistribution and use in source and binary forms, with or without @@ -28,15 +29,396 @@ #include "defs.h" -#ifdef HAVE_LINUX_PERF_EVENT_H -# include -#endif +#include "perf_event_struct.h" +#include "xlat/clocknames.h" +#include "xlat/hw_breakpoint_len.h" +#include "xlat/hw_breakpoint_type.h" +#include "xlat/perf_attr_size.h" +#include "xlat/perf_branch_sample_type.h" #include "xlat/perf_event_open_flags.h" +#include "xlat/perf_event_read_format.h" +#include "xlat/perf_event_sample_format.h" +#include "xlat/perf_hw_cache_id.h" +#include "xlat/perf_hw_cache_op_id.h" +#include "xlat/perf_hw_cache_op_result_id.h" +#include "xlat/perf_hw_id.h" +#include "xlat/perf_sw_ids.h" +#include "xlat/perf_type_id.h" + +struct pea_desc { + struct perf_event_attr *attr; + uint32_t size; +}; + +static void +free_pea_desc(void *pea_desc_ptr) +{ + struct pea_desc *desc = pea_desc_ptr; + + free(desc->attr); + free(desc); +} + +static int +fetch_perf_event_attr(struct tcb *tcp, unsigned long addr) +{ + struct pea_desc *desc; + struct perf_event_attr *attr; + uint32_t size; + + if (umove(tcp, addr + offsetof(struct perf_event_attr, size), &size)) { + printaddr(addr); + return 1; + } + + if (size > sizeof(*attr)) + size = sizeof(*attr); + + if (!size) + size = PERF_ATTR_SIZE_VER0; + + /* + * Kernel (rightfully) deems invalid attribute structures with size less + * than first published format size, and we do the same. + */ + if (size < PERF_ATTR_SIZE_VER0) { + printaddr(addr); + return 1; + } + + if (abbrev(tcp)) + size = offsetofend(struct perf_event_attr, config); + + /* Size should be multiple of 8, but kernel doesn't check for it */ + /* size &= ~7; */ + + attr = xcalloc(1, sizeof(*attr)); + + if (umoven_or_printaddr(tcp, addr, size, attr)) { + free(attr); + + return 1; + } + + desc = xmalloc(sizeof(*desc)); + + desc->attr = attr; + desc->size = size; + + set_tcb_priv_data(tcp, desc, free_pea_desc); + + return 0; +} + +#define PRINT_XLAT(prefix, xlat, x, dflt) \ + do { \ + tprints(prefix); \ + printxval_search(xlat, x, dflt); \ + } while (0) + +static void +print_perf_event_attr(struct tcb *tcp, unsigned long addr) +{ + static const char *precise_ip_desc[] = { + "arbitrary skid", + "constant skid", + "requested to have 0 skid", + "must have 0 skid", + }; + + struct pea_desc *desc; + struct perf_event_attr *attr; + uint32_t size; + uint32_t new_size; + int use_new_size = 0; + + /* + * Amusingly, kernel accepts structures with only part of the field + * present, so we making check like this (instead of checking + * offsetofend against size) in order to print fields as kernel sees + * them. This also should work great on big endian architectures. + */ + #define _PERF_CHECK_FIELD(_field) \ + do { \ + if (offsetof(struct perf_event_attr, _field) >= size) \ + goto print_perf_event_attr_out; \ + } while (0) + + desc = get_tcb_priv_data(tcp); + + attr = desc->attr; + size = desc->size; + + /* The only error which expected to change size field currently */ + if (tcp->u_error == E2BIG) { + if (umove(tcp, addr + offsetof(struct perf_event_attr, size), + &new_size)) + use_new_size = -1; + else + use_new_size = 1; + } + + PRINT_XLAT("{type=", perf_type_id, attr->type, "PERF_TYPE_???"); + tprintf(", size="); + printxval(perf_attr_size, attr->size, "PERF_ATTR_SIZE_???"); + + if (use_new_size) { + tprints(" => "); + + if (use_new_size > 0) + printxval(perf_attr_size, new_size, + "PERF_ATTR_SIZE_???"); + else + tprints("???"); + } + + switch (attr->type) { + case PERF_TYPE_HARDWARE: + PRINT_XLAT(", config=", perf_hw_id, attr->config, + "PERF_COUNT_HW_???"); + break; + case PERF_TYPE_SOFTWARE: + PRINT_XLAT(", config=", perf_sw_ids, attr->config, + "PERF_COUNT_SW_???"); + break; + case PERF_TYPE_TRACEPOINT: + /* + * "The value to use in config can be obtained from under + * debugfs tracing/events/../../id if ftrace is enabled in the + * kernel." + */ + tprintf(", config=%" PRIu64, attr->config); + break; + case PERF_TYPE_HW_CACHE: + /* + * (perf_hw_cache_id) | (perf_hw_cache_op_id << 8) | + * (perf_hw_cache_op_result_id << 16) + */ + PRINT_XLAT(", config=", perf_hw_cache_id, attr->config & 0xFF, + "PERF_COUNT_HW_CACHE_???"); + PRINT_XLAT("|", perf_hw_cache_op_id, (attr->config >> 8) & 0xFF, + "PERF_COUNT_HW_CACHE_OP_???"); + /* + * Current code (see set_ext_hw_attr in arch/x86/events/core.c, + * tile_map_cache_event in arch/tile/kernel/perf_event.c, + * arc_pmu_cache_event in arch/arc/kernel/perf_event.c, + * hw_perf_cache_event in arch/blackfin/kernel/perf_event.c, + * _hw_perf_cache_event in arch/metag/kernel/perf/perf_event.c, + * mipspmu_map_cache_event in arch/mips/kernel/perf_event_mipsxx.c, + * hw_perf_cache_event in arch/powerpc/perf/core-book3s.c, + * hw_perf_cache_event in arch/powerpc/perf/core-fsl-emb.c, + * hw_perf_cache_event in arch/sh/kernel/perf_event.c, + * sparc_map_cache_event in arch/sparc/kernel/perf_event.c, + * xtensa_pmu_cache_event in arch/xtensa/kernel/perf_event.c, + * armpmu_map_cache_event in drivers/perf/arm_pmu.c) assumes + * that cache result is 8 bits in size. + */ + PRINT_XLAT("<<8|", perf_hw_cache_op_result_id, + (attr->config >> 16) & 0xFF, + "PERF_COUNT_HW_CACHE_RESULT_???"); + tprintf("<<16"); + if (attr->config >> 24) + tprintf("|%#" PRIx64 "<<24 " + "/* PERF_COUNT_HW_CACHE_??? */", + attr->config >> 24); + break; + case PERF_TYPE_RAW: + /* + * "If type is PERF_TYPE_RAW, then a custom "raw" config + * value is needed. Most CPUs support events that are not + * covered by the "generalized" events. These are + * implementation defined; see your CPU manual (for example the + * Intel Volume 3B documentation or the AMD BIOS and Kernel + * Developer Guide). The libpfm4 library can be used to + * translate from the name in the architectural manuals + * to the raw hex value perf_event_open() expects in this + * field." + */ + case PERF_TYPE_BREAKPOINT: + /* + * "If type is PERF_TYPE_BREAKPOINT, then leave config set + * to zero. Its parameters are set in other places." + */ + default: + tprintf(", config=%#" PRIx64, attr->config); + break; + } + + if (abbrev(tcp)) + goto print_perf_event_attr_out; + + if (attr->freq) + tprintf(", sample_freq=%" PRIu64, attr->sample_freq); + else + tprintf(", sample_period=%" PRIu64, attr->sample_period); + + tprintf(", sample_type="); + printflags64(perf_event_sample_format, attr->sample_type, + "PERF_SAMPLE_???"); + + tprintf(", read_format="); + printflags64(perf_event_read_format, attr->read_format, + "PERF_FORMAT_???"); + + tprintf(", disabled=%u" + ", inherit=%u" + ", pinned=%u" + ", exclusive=%u" + ", exclusive_user=%u" + ", exclude_kernel=%u" + ", exclude_hv=%u" + ", exclude_idle=%u" + ", mmap=%u" + ", comm=%u" + ", freq=%u" + ", inherit_stat=%u" + ", enable_on_exec=%u" + ", task=%u" + ", watermark=%u" + ", precise_ip=%u /* %s */" + ", mmap_data=%u" + ", sample_id_all=%u" + ", exclude_host=%u" + ", exclude_guest=%u" + ", exclude_callchain_kernel=%u" + ", exclude_callchain_user=%u" + ", mmap2=%u" + ", comm_exec=%u" + ", use_clockid=%u" + ", context_switch=%u" + ", write_backward=%u", + attr->disabled, + attr->inherit, + attr->pinned, + attr->exclusive, + attr->exclude_user, + attr->exclude_kernel, + attr->exclude_hv, + attr->exclude_idle, + attr->mmap, + attr->comm, + attr->freq, + attr->inherit_stat, + attr->enable_on_exec, + attr->task, + attr->watermark, + attr->precise_ip, precise_ip_desc[attr->precise_ip], + attr->mmap_data, + attr->sample_id_all, + attr->exclude_host, + attr->exclude_guest, + attr->exclude_callchain_kernel, + attr->exclude_callchain_user, + attr->mmap2, + attr->comm_exec, + attr->use_clockid, + attr->context_switch, + attr->write_backward); + + /* + * Print it only in case it is non-zero, since it may contain flags we + * are not aware about. + */ + if (attr->__reserved_1) + tprintf(", __reserved_1=%#llx /* Bits 63..28 */", + (unsigned long long) attr->__reserved_1); + + if (attr->watermark) + tprintf(", wakeup_watermark=%u", attr->wakeup_watermark); + else + tprintf(", wakeup_events=%u", attr->wakeup_events); + + if (attr->type == PERF_TYPE_BREAKPOINT) + /* Any combination of R/W with X is deemed invalid */ + PRINT_XLAT(", bp_type=", hw_breakpoint_type, attr->bp_type, + (attr->bp_type <= + (HW_BREAKPOINT_X | HW_BREAKPOINT_RW)) ? + "HW_BREAKPOINT_INVALID" : + "HW_BREAKPOINT_???"); + + if (attr->type == PERF_TYPE_BREAKPOINT) + tprintf(", bp_addr=%#" PRIx64, attr->bp_addr); + else + tprintf(", config1=%#" PRIx64, attr->config1); + + /* + * Fields after bp_addr/config1 are optional and may not present; check + * against size is needed. + */ + + _PERF_CHECK_FIELD(bp_len); + if (attr->type == PERF_TYPE_BREAKPOINT) + tprintf(", bp_len=%" PRIu64, attr->bp_len); + else + tprintf(", config2=%#" PRIx64, attr->config2); + + _PERF_CHECK_FIELD(branch_sample_type); + if (attr->sample_type & PERF_SAMPLE_BRANCH_STACK) { + tprintf(", branch_sample_type="); + printflags64(perf_branch_sample_type, attr->branch_sample_type, + "PERF_SAMPLE_BRANCH_???"); + } + + _PERF_CHECK_FIELD(sample_regs_user); + /* + * "This bit mask defines the set of user CPU registers to dump on + * samples. The layout of the register mask is architecture-specific and + * described in the kernel header + * arch/ARCH/include/uapi/asm/perf_regs.h." + */ + tprintf(", sample_regs_user=%#" PRIx64, attr->sample_regs_user); + + _PERF_CHECK_FIELD(sample_stack_user); + /* + * "size of the user stack to dump if PERF_SAMPLE_STACK_USER is + * specified." + */ + if (attr->sample_type & PERF_SAMPLE_STACK_USER) + tprintf(", sample_stack_user=%#" PRIx32, + attr->sample_stack_user); + + if (attr->use_clockid) { + _PERF_CHECK_FIELD(clockid); + tprintf(", clockid="); + printxval(clocknames, attr->clockid, "CLOCK_???"); + } + + _PERF_CHECK_FIELD(sample_regs_intr); + tprintf(", sample_regs_intr=%#" PRIx64, attr->sample_regs_intr); + + _PERF_CHECK_FIELD(aux_watermark); + tprintf(", aux_watermark=%" PRIu32, attr->aux_watermark); + + _PERF_CHECK_FIELD(sample_max_stack); + tprintf(", sample_max_stack=%" PRIu16, attr->sample_max_stack); + + /* _PERF_CHECK_FIELD(__reserved_2); + tprintf(", __reserved2=%" PRIu16, attr->__reserved_2); */ + +print_perf_event_attr_out: + if ((attr->size && (attr->size > size)) || + (!attr->size && (size < PERF_ATTR_SIZE_VER0))) + tprintf(", ..."); + + tprintf("}"); +} SYS_FUNC(perf_event_open) { - printaddr(tcp->u_arg[0]); + /* + * We try to copy out the whole structure on entering in order to check + * size value on exiting. We do not check the rest of the fields because + * they shouldn't be changed, but copy the whole structure instead + * of just size field because they could. + */ + if (entering(tcp)) { + if (!fetch_perf_event_attr(tcp, tcp->u_arg[0])) + return 0; + } else { + print_perf_event_attr(tcp, tcp->u_arg[0]); + } + tprintf(", %d, %d, %d, ", (int) tcp->u_arg[1], (int) tcp->u_arg[2], diff --git a/perf_event_struct.h b/perf_event_struct.h new file mode 100644 index 00000000..161f6383 --- /dev/null +++ b/perf_event_struct.h @@ -0,0 +1,73 @@ +#ifndef STRACE_LINUX_PERF_EVENT_STRUCT_H +#define STRACE_LINUX_PERF_EVENT_STRUCT_H + +#include + +struct perf_event_attr { + uint32_t type; + uint32_t size; + uint64_t config; + union { + uint64_t sample_period; + uint64_t sample_freq; + }; + uint64_t sample_type; + uint64_t read_format; + uint64_t disabled :1, + inherit :1, + pinned :1, + exclusive :1, + exclude_user :1, + exclude_kernel :1, + exclude_hv :1, + exclude_idle :1, + mmap :1, + comm :1, + freq :1, + inherit_stat :1, + enable_on_exec :1, + task :1, + watermark :1, + precise_ip :2, + mmap_data :1, + sample_id_all :1, + exclude_host :1, + exclude_guest :1, + exclude_callchain_kernel :1, + exclude_callchain_user :1, + mmap2 :1, + comm_exec :1, + use_clockid :1, + context_switch :1, + write_backward :1, + __reserved_1 :36; + union { + uint32_t wakeup_events; + uint32_t wakeup_watermark; + }; + uint32_t bp_type; + union { + uint64_t bp_addr; + uint64_t config1; + }; + /* End of ver 0 - 64 bytes */ + union { + uint64_t bp_len; + uint64_t config2; + }; + /* End of ver 1 - 72 bytes */ + uint64_t branch_sample_type; + /* End of ver 2 - 80 bytes */ + uint64_t sample_regs_user; + uint32_t sample_stack_user; + int32_t clockid; + /* End of ver 3 - 96 bytes */ + uint64_t sample_regs_intr; + /* End of ver 4 - 104 bytes */ + uint32_t aux_watermark; + uint16_t sample_max_stack; + uint16_t __reserved_2; + /* End of ver 5 - 112 bytes */ +}; + +#endif /* !STRACE_LINUX_PERF_EVENT_STRUCT_H */ diff --git a/tests/.gitignore b/tests/.gitignore index 2771e612..d050eb80 100644 --- a/tests/.gitignore +++ b/tests/.gitignore @@ -191,7 +191,7 @@ open openat pause pc -perf_event_open +perf_event_open_nonverbose personality pipe poll diff --git a/tests/Makefile.am b/tests/Makefile.am index 499eb4b5..1719c612 100644 --- a/tests/Makefile.am +++ b/tests/Makefile.am @@ -249,7 +249,7 @@ check_PROGRAMS = \ openat \ pause \ pc \ - perf_event_open \ + perf_event_open_nonverbose \ personality \ pipe \ poll \ @@ -608,7 +608,7 @@ DECODER_TESTS = \ open.test \ openat.test \ pause.test \ - perf_event_open.test \ + perf_event_open_nonverbose.test \ personality.test \ pipe.test \ poll.test \ diff --git a/tests/perf_event_open.c b/tests/perf_event_open_nonverbose.c similarity index 100% rename from tests/perf_event_open.c rename to tests/perf_event_open_nonverbose.c diff --git a/tests/perf_event_open.test b/tests/perf_event_open_nonverbose.test similarity index 54% rename from tests/perf_event_open.test rename to tests/perf_event_open_nonverbose.test index 0e46556a..404827fe 100755 --- a/tests/perf_event_open.test +++ b/tests/perf_event_open_nonverbose.test @@ -3,4 +3,4 @@ # Check decoding of perf_event_open syscall. . "${srcdir=.}/init.sh" -run_strace_match_diff -a34 +run_strace_match_diff -a34 -e verbose=none -e trace=perf_event_open diff --git a/xlat/hw_breakpoint_len.in b/xlat/hw_breakpoint_len.in new file mode 100644 index 00000000..f2b91a03 --- /dev/null +++ b/xlat/hw_breakpoint_len.in @@ -0,0 +1,4 @@ +HW_BREAKPOINT_LEN_1 1 +HW_BREAKPOINT_LEN_2 2 +HW_BREAKPOINT_LEN_4 4 +HW_BREAKPOINT_LEN_8 8 diff --git a/xlat/hw_breakpoint_type.in b/xlat/hw_breakpoint_type.in new file mode 100644 index 00000000..33645d0c --- /dev/null +++ b/xlat/hw_breakpoint_type.in @@ -0,0 +1,6 @@ +HW_BREAKPOINT_EMPTY 0 +HW_BREAKPOINT_R 1 +HW_BREAKPOINT_W 2 +HW_BREAKPOINT_RW HW_BREAKPOINT_R | HW_BREAKPOINT_W +HW_BREAKPOINT_X 4 +#unterminated diff --git a/xlat/perf_attr_size.in b/xlat/perf_attr_size.in new file mode 100644 index 00000000..d597cd1d --- /dev/null +++ b/xlat/perf_attr_size.in @@ -0,0 +1,6 @@ +PERF_ATTR_SIZE_VER0 64 +PERF_ATTR_SIZE_VER1 72 +PERF_ATTR_SIZE_VER2 80 +PERF_ATTR_SIZE_VER3 96 +PERF_ATTR_SIZE_VER4 104 +PERF_ATTR_SIZE_VER5 112 diff --git a/xlat/perf_branch_sample_type.in b/xlat/perf_branch_sample_type.in new file mode 100644 index 00000000..0e33d980 --- /dev/null +++ b/xlat/perf_branch_sample_type.in @@ -0,0 +1,16 @@ +PERF_SAMPLE_BRANCH_USER 1 << 0 +PERF_SAMPLE_BRANCH_KERNEL 1 << 1 +PERF_SAMPLE_BRANCH_HV 1 << 2 +PERF_SAMPLE_BRANCH_ANY 1 << 3 +PERF_SAMPLE_BRANCH_ANY_CALL 1 << 4 +PERF_SAMPLE_BRANCH_ANY_RETURN 1 << 5 +PERF_SAMPLE_BRANCH_IND_CALL 1 << 6 +PERF_SAMPLE_BRANCH_ABORT_TX 1 << 7 +PERF_SAMPLE_BRANCH_IN_TX 1 << 8 +PERF_SAMPLE_BRANCH_NO_TX 1 << 9 +PERF_SAMPLE_BRANCH_COND 1 << 10 +PERF_SAMPLE_BRANCH_CALL_STACK 1 << 11 +PERF_SAMPLE_BRANCH_IND_JUMP 1 << 12 +PERF_SAMPLE_BRANCH_CALL 1 << 13 +PERF_SAMPLE_BRANCH_NO_FLAGS 1 << 14 +PERF_SAMPLE_BRANCH_NO_CYCLES 1 << 15 diff --git a/xlat/perf_event_read_format.in b/xlat/perf_event_read_format.in new file mode 100644 index 00000000..a270700f --- /dev/null +++ b/xlat/perf_event_read_format.in @@ -0,0 +1,4 @@ +PERF_FORMAT_TOTAL_TIME_ENABLED 1 << 0 +PERF_FORMAT_TOTAL_TIME_RUNNING 1 << 1 +PERF_FORMAT_ID 1 << 2 +PERF_FORMAT_GROUP 1 << 3 diff --git a/xlat/perf_event_sample_format.in b/xlat/perf_event_sample_format.in new file mode 100644 index 00000000..6203e174 --- /dev/null +++ b/xlat/perf_event_sample_format.in @@ -0,0 +1,19 @@ +PERF_SAMPLE_IP 1 << 0 +PERF_SAMPLE_TID 1 << 1 +PERF_SAMPLE_TIME 1 << 2 +PERF_SAMPLE_ADDR 1 << 3 +PERF_SAMPLE_READ 1 << 4 +PERF_SAMPLE_CALLCHAIN 1 << 5 +PERF_SAMPLE_ID 1 << 6 +PERF_SAMPLE_CPU 1 << 7 +PERF_SAMPLE_PERIOD 1 << 8 +PERF_SAMPLE_STREAM_ID 1 << 9 +PERF_SAMPLE_RAW 1 << 10 +PERF_SAMPLE_BRANCH_STACK 1 << 11 +PERF_SAMPLE_REGS_USER 1 << 12 +PERF_SAMPLE_STACK_USER 1 << 13 +PERF_SAMPLE_WEIGHT 1 << 14 +PERF_SAMPLE_DATA_SRC 1 << 15 +PERF_SAMPLE_IDENTIFIER 1 << 16 +PERF_SAMPLE_TRANSACTION 1 << 17 +PERF_SAMPLE_REGS_INTR 1 << 18 diff --git a/xlat/perf_hw_cache_id.in b/xlat/perf_hw_cache_id.in new file mode 100644 index 00000000..ecddcb0c --- /dev/null +++ b/xlat/perf_hw_cache_id.in @@ -0,0 +1,8 @@ +PERF_COUNT_HW_CACHE_L1D 0 +PERF_COUNT_HW_CACHE_L1I 1 +PERF_COUNT_HW_CACHE_LL 2 +PERF_COUNT_HW_CACHE_DTLB 3 +PERF_COUNT_HW_CACHE_ITLB 4 +PERF_COUNT_HW_CACHE_BPU 5 +PERF_COUNT_HW_CACHE_NODE 6 +#unterminated diff --git a/xlat/perf_hw_cache_op_id.in b/xlat/perf_hw_cache_op_id.in new file mode 100644 index 00000000..8a46e0d7 --- /dev/null +++ b/xlat/perf_hw_cache_op_id.in @@ -0,0 +1,4 @@ +PERF_COUNT_HW_CACHE_OP_READ 0 +PERF_COUNT_HW_CACHE_OP_WRITE 1 +PERF_COUNT_HW_CACHE_OP_PREFETCH 2 +#unterminated diff --git a/xlat/perf_hw_cache_op_result_id.in b/xlat/perf_hw_cache_op_result_id.in new file mode 100644 index 00000000..d2a77f5a --- /dev/null +++ b/xlat/perf_hw_cache_op_result_id.in @@ -0,0 +1,3 @@ +PERF_COUNT_HW_CACHE_RESULT_ACCESS 0 +PERF_COUNT_HW_CACHE_RESULT_MISS 1 +#unterminated diff --git a/xlat/perf_hw_id.in b/xlat/perf_hw_id.in new file mode 100644 index 00000000..a642d0b4 --- /dev/null +++ b/xlat/perf_hw_id.in @@ -0,0 +1,11 @@ +PERF_COUNT_HW_CPU_CYCLES 0 +PERF_COUNT_HW_INSTRUCTIONS 1 +PERF_COUNT_HW_CACHE_REFERENCES 2 +PERF_COUNT_HW_CACHE_MISSES 3 +PERF_COUNT_HW_BRANCH_INSTRUCTIONS 4 +PERF_COUNT_HW_BRANCH_MISSES 5 +PERF_COUNT_HW_BUS_CYCLES 6 +PERF_COUNT_HW_STALLED_CYCLES_FRONTEND 7 +PERF_COUNT_HW_STALLED_CYCLES_BACKEND 8 +PERF_COUNT_HW_REF_CPU_CYCLES 9 +#unterminated diff --git a/xlat/perf_sw_ids.in b/xlat/perf_sw_ids.in new file mode 100644 index 00000000..95ca15c4 --- /dev/null +++ b/xlat/perf_sw_ids.in @@ -0,0 +1,12 @@ +PERF_COUNT_SW_CPU_CLOCK 0 +PERF_COUNT_SW_TASK_CLOCK 1 +PERF_COUNT_SW_PAGE_FAULTS 2 +PERF_COUNT_SW_CONTEXT_SWITCHES 3 +PERF_COUNT_SW_CPU_MIGRATIONS 4 +PERF_COUNT_SW_PAGE_FAULTS_MIN 5 +PERF_COUNT_SW_PAGE_FAULTS_MAJ 6 +PERF_COUNT_SW_ALIGNMENT_FAULTS 7 +PERF_COUNT_SW_EMULATION_FAULTS 8 +PERF_COUNT_SW_DUMMY 9 +PERF_COUNT_SW_BPF_OUTPUT 10 +#unterminated diff --git a/xlat/perf_type_id.in b/xlat/perf_type_id.in new file mode 100644 index 00000000..9133e74d --- /dev/null +++ b/xlat/perf_type_id.in @@ -0,0 +1,7 @@ +PERF_TYPE_HARDWARE 0 +PERF_TYPE_SOFTWARE 1 +PERF_TYPE_TRACEPOINT 2 +PERF_TYPE_HW_CACHE 3 +PERF_TYPE_RAW 4 +PERF_TYPE_BREAKPOINT 5 +#unterminated -- 2.40.0