From 647e08195b3cd45cee0059fe8bb0a07b504006ec Mon Sep 17 00:00:00 2001 From: Taewook Oh Date: Sat, 28 Jan 2017 07:05:43 +0000 Subject: [PATCH] [InstCombine] Merge DebugLoc when speculatively hoisting store instruction Summary: Along with https://reviews.llvm.org/D27804, debug locations need to be merged when hoisting store instructions as well. Not sure if just dropping debug locations would make more sense for this case, but as the branch instruction will have at least different discriminator with the hoisted store instruction, I think there will be no difference in practice. Reviewers: aprantl, andreadb, danielcdh Reviewed By: aprantl Subscribers: llvm-commits Differential Revision: https://reviews.llvm.org/D29062 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@293372 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/Transforms/Utils/SimplifyCFG.cpp | 19 +++--- test/Transforms/SimplifyCFG/remove-debug-2.ll | 68 +++++++++++++++++++ 2 files changed, 79 insertions(+), 8 deletions(-) create mode 100644 test/Transforms/SimplifyCFG/remove-debug-2.ll diff --git a/lib/Transforms/Utils/SimplifyCFG.cpp b/lib/Transforms/Utils/SimplifyCFG.cpp index e287916f2a6..464793629e7 100644 --- a/lib/Transforms/Utils/SimplifyCFG.cpp +++ b/lib/Transforms/Utils/SimplifyCFG.cpp @@ -1280,7 +1280,7 @@ static bool HoistThenElseCodeToIf(BranchInst *BI, if (!isa(I1)) I1->setDebugLoc( DILocation::getMergedLocation(I1->getDebugLoc(), I2->getDebugLoc())); - + I2->eraseFromParent(); Changed = true; @@ -1546,7 +1546,7 @@ static bool sinkLastInstruction(ArrayRef Blocks) { })) return false; } - + // We don't need to do any more checking here; canSinkLastInstruction should // have done it all for us. SmallVector NewOperands; @@ -1653,7 +1653,7 @@ namespace { bool isValid() const { return !Fail; } - + void operator -- () { if (Fail) return; @@ -1737,7 +1737,7 @@ static bool SinkThenElseCodeToEnd(BranchInst *BI1) { } if (UnconditionalPreds.size() < 2) return false; - + bool Changed = false; // We take a two-step approach to tail sinking. First we scan from the end of // each block upwards in lockstep. If the n'th instruction from the end of each @@ -1767,7 +1767,7 @@ static bool SinkThenElseCodeToEnd(BranchInst *BI1) { unsigned NumPHIInsts = NumPHIdValues / UnconditionalPreds.size(); if ((NumPHIdValues % UnconditionalPreds.size()) != 0) NumPHIInsts++; - + return NumPHIInsts <= 1; }; @@ -1790,7 +1790,7 @@ static bool SinkThenElseCodeToEnd(BranchInst *BI1) { } if (!Profitable) return false; - + DEBUG(dbgs() << "SINK: Splitting edge\n"); // We have a conditional edge and we're going to sink some instructions. // Insert a new block postdominating all blocks we're going to sink from. @@ -1800,7 +1800,7 @@ static bool SinkThenElseCodeToEnd(BranchInst *BI1) { return false; Changed = true; } - + // Now that we've analyzed all potential sinking candidates, perform the // actual sink. We iteratively sink the last non-terminator of the source // blocks into their common successor unless doing so would require too @@ -1826,7 +1826,7 @@ static bool SinkThenElseCodeToEnd(BranchInst *BI1) { DEBUG(dbgs() << "SINK: stopping here, too many PHIs would be created!\n"); break; } - + if (!sinkLastInstruction(UnconditionalPreds)) return Changed; NumSinkCommons++; @@ -2078,6 +2078,9 @@ static bool SpeculativelyExecuteBB(BranchInst *BI, BasicBlock *ThenBB, Value *S = Builder.CreateSelect( BrCond, TrueV, FalseV, TrueV->getName() + "." + FalseV->getName(), BI); SpeculatedStore->setOperand(0, S); + SpeculatedStore->setDebugLoc( + DILocation::getMergedLocation( + BI->getDebugLoc(), SpeculatedStore->getDebugLoc())); } // Metadata can be dependent on the condition we are hoisting above. diff --git a/test/Transforms/SimplifyCFG/remove-debug-2.ll b/test/Transforms/SimplifyCFG/remove-debug-2.ll new file mode 100644 index 00000000000..6362f53e14c --- /dev/null +++ b/test/Transforms/SimplifyCFG/remove-debug-2.ll @@ -0,0 +1,68 @@ +; RUN: opt < %s -simplifycfg -S | FileCheck %s + +; Check if the debug info for hoisted store for "ret = 0" is removed +; +; int foo(int x) { +; int ret = 1; +; if (x) +; ret = 0; +; return ret; +; } +; +; CHECK: store i32 1,{{.+}}!dbg ![[DLOC1:[0-9]+]] +; CHECK: icmp ne {{.+}}!dbg ![[DLOC2:[0-9]+]] +; CHECK: [[VREG:%[^ ]+]] = select +; CHECK: store i32 [[VREG]] +; CHECK-NOT: !dbg +; CHECK-SAME: {{$}} +; CHECK: ret {{.+}}!dbg ![[DLOC3:[0-9]+]] +; CHECK: ![[DLOC1]] = !DILocation(line: 2 +; CHECK: ![[DLOC2]] = !DILocation(line: 3 +; CHECK: ![[DLOC3]] = !DILocation(line: 5 + +target triple = "x86_64-unknown-linux-gnu" + +; Function Attrs: noinline nounwind uwtable +define i32 @foo(i32) !dbg !6 { + %2 = alloca i32, align 4 + %3 = alloca i32, align 4 + store i32 %0, i32* %2, align 4 + store i32 1, i32* %3, align 4, !dbg !14 + %4 = load i32, i32* %2, align 4, !dbg !15 + %5 = icmp ne i32 %4, 0, !dbg !15 + br i1 %5, label %6, label %7, !dbg !17 + +;