From 63ddb7095d864f2e8635fdde07b65e0f938dff5a Mon Sep 17 00:00:00 2001 From: DeForest Richards Date: Sun, 6 Oct 2019 22:49:22 +0000 Subject: [PATCH] [Docs] Removes Subsystem Documentation page Removes Subsystem Documentation page. Also moves existing topics on Subsystem Documentation page to User Guides and Reference pages. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@373872 91177308-0d34-0410-b5e6-96231b3b80d8 --- docs/Reference.rst | 96 ++++++++++++++++++- docs/SubsystemDocumentation.rst | 158 -------------------------------- docs/UserGuides.rst | 90 +++++++++++++++--- docs/index.rst | 4 - 4 files changed, 171 insertions(+), 177 deletions(-) delete mode 100644 docs/SubsystemDocumentation.rst diff --git a/docs/Reference.rst b/docs/Reference.rst index 0e55be30266..a24a8a1eade 100644 --- a/docs/Reference.rst +++ b/docs/Reference.rst @@ -10,23 +10,47 @@ LLVM and API reference documentation. :hidden: Atomics + BitCodeFormat + BlockFrequencyTerminology + BranchWeightMetadata Bugpoint + CFIVerify CommandGuide/index CompilerWriterInfo + Coroutines + DependenceGraphs/index + ExceptionHandling Extensions + FaultMaps FuzzingLLVM GarbageCollection GetElementPtr + GlobalISel GwpAsan HowToSetUpLLVMStyleRTTI + HowToUseAttributes + InAlloca LangRef LibFuzzer + MarkedUpDisassembly + MemorySSA MIRLangRef OptBisect + ORCv2 PDB/index ScudoHardenedAllocator + SegmentedStacks + StackMaps + SpeculativeLoadHardening + SupportLibrary Statepoints + SystemLibrary TestingGuide + TransformMetadata + TypeMetadata + XRay + XRayExample + XRayFDRFormat YamlIO API Reference @@ -37,6 +61,10 @@ API Reference `Documentation for Go bindings `_ +:doc:`ORCv2` + Describes the design and implementation of the ORC APIs, including some + usage examples, and a guide for users transitioning from ORCv1 to ORCv2. + LLVM Reference -------------- @@ -44,16 +72,32 @@ LLVM Reference Defines the LLVM intermediate representation and the assembly form of the different nodes. +:doc:`FaultMaps` + LLVM support for folding control flow into faulting machine instructions. + +:doc:`InAlloca` + Description of the ``inalloca`` argument attribute. + :doc:`Machine IR (MIR) Format Reference Manual ` A reference manual for the MIR serialization format, which is used to test LLVM's code generation passes. +:doc:`GlobalISel` + This describes the prototype instruction selection replacement, GlobalISel. + :doc:`Atomics` Information about LLVM's concurrency model. +:doc:`ExceptionHandling` + This document describes the design and implementation of exception handling + in LLVM. + :doc:`CompilerWriterInfo` A list of helpful links for compiler writers. +:doc:`BitCodeFormat` + This describes the file format and encoding used for LLVM "bc" files. + :doc:`Extensions` LLVM-specific extensions to tools and formats LLVM seeks compatibility with. @@ -61,6 +105,20 @@ LLVM Reference How to make ``isa<>``, ``dyn_cast<>``, etc. available for clients of your class hierarchy. +:doc:`BlockFrequencyTerminology` + Provides information about terminology used in the ``BlockFrequencyInfo`` + analysis pass. + +:doc:`BranchWeightMetadata` + Provides information about Branch Prediction Information. + +:doc:`MemorySSA` + Information about the MemorySSA utility in LLVM, as well as how to use it. + +:doc:`Support Library ` + This document describes the LLVM Support Library (``lib/Support``) and + how to keep LLVM source code portable + :doc:`GetElementPtr` Answers to some very frequent questions about LLVM's most frequently misunderstood instruction. @@ -71,6 +129,32 @@ LLVM Reference :doc:`GwpAsan` A sampled heap memory error detection toolkit designed for production use. +:doc:`Dependence Graphs ` + A description of the design of the various dependence graphs such as + the DDG (Data Dependence Graph). + +:doc:`CFIVerify` + A description of the verification tool for Control Flow Integrity. + +:doc:`SpeculativeLoadHardening` + A description of the Speculative Load Hardening mitigation for Spectre v1. + +:doc:`SegmentedStacks` + This document describes segmented stacks and how they are used in LLVM. + +:doc:`MarkedUpDisassembly` + This document describes the optional rich disassembly output syntax. + +:doc:`HowToUseAttributes` + Answers some questions about the new Attributes infrastructure. + +:doc:`StackMaps` + LLVM support for mapping instruction addresses to the location of + values and allowing code to be patched. + +:doc:`Coroutines` + LLVM support for coroutines. + :doc:`YamlIO` A reference guide for using LLVM's YAML I/O library. @@ -122,4 +206,14 @@ Testing A reference manual for using the LLVM testing infrastructure. :doc:`TestSuiteGuide` - Describes how to compile and run the test-suite benchmarks. \ No newline at end of file + Describes how to compile and run the test-suite benchmarks. + +==== +XRay +==== + +:doc:`XRay` + High-level documentation of how to use XRay in LLVM. + +:doc:`XRayExample` + An example of how to debug an application with XRay. \ No newline at end of file diff --git a/docs/SubsystemDocumentation.rst b/docs/SubsystemDocumentation.rst deleted file mode 100644 index 81feb43f2ee..00000000000 --- a/docs/SubsystemDocumentation.rst +++ /dev/null @@ -1,158 +0,0 @@ -.. _index-subsystem-docs: - -Subsystem Documentation -======================= - -For API clients and LLVM developers. - -.. toctree:: - :hidden: - - AliasAnalysis - MemorySSA - BitCodeFormat - BlockFrequencyTerminology - BranchWeightMetadata - CodeGenerator - ExceptionHandling - AddingConstrainedIntrinsics - LinkTimeOptimization - SegmentedStacks - TableGenFundamentals - DebuggingJITedCode - GoldPlugin - MarkedUpDisassembly - SystemLibrary - SupportLibrary - SourceLevelDebugging - Vectorizers - HowToUseAttributes - StackMaps - InAlloca - BigEndianNEON - CoverageMappingFormat - MergeFunctions - TypeMetadata - TransformMetadata - FaultMaps - Coroutines - GlobalISel - XRay - XRayExample - XRayFDRFormat - CFIVerify - SpeculativeLoadHardening - StackSafetyAnalysis - LoopTerminology - DependenceGraphs/index - -:doc:`AliasAnalysis` - Information on how to write a new alias analysis implementation or how to - use existing analyses. - -:doc:`MemorySSA` - Information about the MemorySSA utility in LLVM, as well as how to use it. - -:doc:`Source Level Debugging with LLVM ` - This document describes the design and philosophy behind the LLVM - source-level debugger. - -:doc:`Vectorizers` - This document describes the current status of vectorization in LLVM. - -:doc:`ExceptionHandling` - This document describes the design and implementation of exception handling - in LLVM. - -:doc:`AddingConstrainedIntrinsics` - Gives the steps necessary when adding a new constrained math intrinsic - to LLVM. - -:doc:`BitCodeFormat` - This describes the file format and encoding used for LLVM "bc" files. - -:doc:`Support Library ` - This document describes the LLVM Support Library (``lib/Support``) and - how to keep LLVM source code portable - -:doc:`LinkTimeOptimization` - This document describes the interface between LLVM intermodular optimizer - and the linker and its design - -:doc:`GoldPlugin` - How to build your programs with link-time optimization on Linux. - -:doc:`DebuggingJITedCode` - How to debug JITed code with GDB. - -:doc:`MCJITDesignAndImplementation` - Describes the inner workings of MCJIT execution engine. - -:doc:`ORCv2` - Describes the design and implementation of the ORC APIs, including some - usage examples, and a guide for users transitioning from ORCv1 to ORCv2. - -:doc:`BranchWeightMetadata` - Provides information about Branch Prediction Information. - -:doc:`BlockFrequencyTerminology` - Provides information about terminology used in the ``BlockFrequencyInfo`` - analysis pass. - -:doc:`SegmentedStacks` - This document describes segmented stacks and how they are used in LLVM. - -:doc:`MarkedUpDisassembly` - This document describes the optional rich disassembly output syntax. - -:doc:`HowToUseAttributes` - Answers some questions about the new Attributes infrastructure. - -:doc:`StackMaps` - LLVM support for mapping instruction addresses to the location of - values and allowing code to be patched. - -:doc:`BigEndianNEON` - LLVM's support for generating NEON instructions on big endian ARM targets is - somewhat nonintuitive. This document explains the implementation and rationale. - -:doc:`CoverageMappingFormat` - This describes the format and encoding used for LLVM’s code coverage mapping. - -:doc:`MergeFunctions` - Describes functions merging optimization. - -:doc:`InAlloca` - Description of the ``inalloca`` argument attribute. - -:doc:`FaultMaps` - LLVM support for folding control flow into faulting machine instructions. - -:doc:`CompileCudaWithLLVM` - LLVM support for CUDA. - -:doc:`Coroutines` - LLVM support for coroutines. - -:doc:`GlobalISel` - This describes the prototype instruction selection replacement, GlobalISel. - -:doc:`XRay` - High-level documentation of how to use XRay in LLVM. - -:doc:`XRayExample` - An example of how to debug an application with XRay. - -:doc:`CFIVerify` - A description of the verification tool for Control Flow Integrity. - -:doc:`SpeculativeLoadHardening` - A description of the Speculative Load Hardening mitigation for Spectre v1. - -:doc:`StackSafetyAnalysis` - This document describes the design of the stack safety analysis of local - variables. - -:doc:`Dependence Graphs ` - A description of the design of the various dependence graphs such as - the DDG (Data Dependence Graph). \ No newline at end of file diff --git a/docs/UserGuides.rst b/docs/UserGuides.rst index ddb3acf6fbd..5c035d1717d 100644 --- a/docs/UserGuides.rst +++ b/docs/UserGuides.rst @@ -12,33 +12,46 @@ intermediate LLVM representation. .. toctree:: :hidden: + AddingConstrainedIntrinsics + AdvancedBuilds + AliasAnalysis + AMDGPUUsage + Benchmarking + BigEndianNEON + BuildingADistribution CMake CMakePrimer - AdvancedBuilds + CodeGenerator + CodeOfConduct + CommandLine + CompileCudaWithLLVM + CoverageMappingFormat + DebuggingJITedCode + Docker + ExtendingLLVM + GoldPlugin HowToBuildOnARM HowToBuildWithPGO HowToCrossCompileBuiltinsOnArm HowToCrossCompileLLVM - yaml2obj + LinkTimeOptimization + LoopTerminology MarkdownQuickstartTemplate + MergeFunctions + MCJITDesignAndImplementation + NVPTXUsage Phabricator Passes - MCJITDesignAndImplementation - ORCv2 - CodeOfConduct - CompileCudaWithLLVM ReportingGuide - Benchmarking - Docker - BuildingADistribution Remarks + StackSafetyAnalysis + SourceLevelDebugging + TableGen/index + TableGenFundamentals + Vectorizers WritingAnLLVMPass WritingAnLLVMBackend - TableGen/index - NVPTXUsage - AMDGPUUsage - ExtendingLLVM - CommandLine + yaml2obj Clang ----- @@ -57,6 +70,9 @@ Clang .. __: http://clang.llvm.org/get_started.html +:doc:`CoverageMappingFormat` + This describes the format and encoding used for LLVM’s code coverage mapping. + LLVM Builds and Distributions ----------------------------- @@ -80,12 +96,37 @@ Optimizations :doc:`Passes` A list of optimizations and analyses implemented in LLVM. +:doc:`StackSafetyAnalysis` + This document describes the design of the stack safety analysis of local + variables. + +:doc:`MergeFunctions` + Describes functions merging optimization. + +:doc:`AliasAnalysis` + Information on how to write a new alias analysis implementation or how to + use existing analyses. + :doc:`LoopTerminology` A document describing Loops and associated terms as used in LLVM. +:doc:`Vectorizers` + This document describes the current status of vectorization in LLVM. + +:doc:`LinkTimeOptimization` + This document describes the interface between LLVM intermodular optimizer + and the linker and its design + +:doc:`GoldPlugin` + How to build your programs with link-time optimization on Linux. + :doc:`Remarks` A reference on the implementation of remarks in LLVM. +:doc:`Source Level Debugging with LLVM ` + This document describes the design and philosophy behind the LLVM + source-level debugger. + Code Generation --------------- @@ -101,6 +142,16 @@ Code Generation Describes the TableGen tool, which is used heavily by the LLVM code generator. +=== +JIT +=== + +:doc:`MCJITDesignAndImplementation` + Describes the inner workings of MCJIT execution engine. + +:doc:`DebuggingJITedCode` + How to debug JITed code with GDB. + Additional Topics ----------------- @@ -110,9 +161,20 @@ Additional Topics :doc:`ExtendingLLVM` Look here to see how to add instructions and intrinsics to LLVM. +:doc:`AddingConstrainedIntrinsics` + Gives the steps necessary when adding a new constrained math intrinsic + to LLVM. + :doc:`HowToCrossCompileBuiltinsOnArm` Notes on cross-building and testing the compiler-rt builtins for Arm. +:doc:`BigEndianNEON` + LLVM's support for generating NEON instructions on big endian ARM targets is + somewhat nonintuitive. This document explains the implementation and rationale. + +:doc:`CompileCudaWithLLVM` + LLVM support for CUDA. + :doc:`NVPTXUsage` This document describes using the NVPTX backend to compile GPU kernels. diff --git a/docs/index.rst b/docs/index.rst index c5ddabfe040..531616d6912 100644 --- a/docs/index.rst +++ b/docs/index.rst @@ -55,7 +55,6 @@ Getting Started, How-tos, Developer Guides, and Tutorials. GettingStartedTutorials Reference - SubsystemDocumentation UserGuides :doc:`GettingStartedTutorials` @@ -64,9 +63,6 @@ Getting Started, How-tos, Developer Guides, and Tutorials. :doc:`UserGuides` User guides and How-tos. -:doc:`SubsystemDocumentation` - For API clients and LLVM developers. - :doc:`Reference` LLVM and API reference documentation. -- 2.40.0