From 63dcb570a11e231061654541e4b53f0cf25b8e8d Mon Sep 17 00:00:00 2001 From: David Majnemer Date: Mon, 15 Aug 2016 07:20:40 +0000 Subject: [PATCH] [CodeGen] Ignore unnamed bitfields before handling vector fields We processed unnamed bitfields after our logic for non-vector field elements in records larger than 128 bits. The vector logic would determine that the bit-field disqualifies the record from occupying a register despite the unnamed bit-field not participating in the record size nor its alignment. N.B. This behavior matches GCC and ICC. git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@278656 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/CodeGen/TargetInfo.cpp | 9 +++++---- test/CodeGen/x86_64-arguments.c | 9 +++++++++ 2 files changed, 14 insertions(+), 4 deletions(-) diff --git a/lib/CodeGen/TargetInfo.cpp b/lib/CodeGen/TargetInfo.cpp index 7b22ddc431..bdf3e4b1ea 100644 --- a/lib/CodeGen/TargetInfo.cpp +++ b/lib/CodeGen/TargetInfo.cpp @@ -2589,6 +2589,10 @@ void X86_64ABIInfo::classify(QualType Ty, uint64_t OffsetBase, uint64_t Offset = OffsetBase + Layout.getFieldOffset(idx); bool BitField = i->isBitField(); + // Ignore padding bit-fields. + if (BitField && i->isUnnamedBitfield()) + continue; + // AMD64-ABI 3.2.3p2: Rule 1. If the size of an object is larger than // four eightbytes, or it contains unaligned fields, it has class MEMORY. // @@ -2621,10 +2625,7 @@ void X86_64ABIInfo::classify(QualType Ty, uint64_t OffsetBase, // structure to be passed in memory even if unaligned, and // therefore they can straddle an eightbyte. if (BitField) { - // Ignore padding bit-fields. - if (i->isUnnamedBitfield()) - continue; - + assert(!i->isUnnamedBitfield()); uint64_t Offset = OffsetBase + Layout.getFieldOffset(idx); uint64_t Size = i->getBitWidthValue(getContext()); diff --git a/test/CodeGen/x86_64-arguments.c b/test/CodeGen/x86_64-arguments.c index de7cfd9d57..9f375d780c 100644 --- a/test/CodeGen/x86_64-arguments.c +++ b/test/CodeGen/x86_64-arguments.c @@ -536,3 +536,12 @@ void f64() { f64_helper(x64, x64, 1.0, 1.0, 1.0, 1.0, 1.0, 1.0i); f64_helper(x64, x64, 1.0, 1.0, 1.0, 1.0, 1.0, 1.0, 1.0i); } + +struct t65 { + __m256 m; + int : 0; +}; +// SSE-LABEL: @f65(%struct.t65* byval align 32 %{{[^,)]+}}) +// AVX: @f65(<8 x float> %{{[^,)]+}}) +void f65(struct t65 a0) { +} -- 2.40.0