From 6392d731a44752ecc7cd2943c63800455f7de9b5 Mon Sep 17 00:00:00 2001 From: Simon Pilgrim Date: Thu, 10 Nov 2016 13:34:17 +0000 Subject: [PATCH] [X86] Add knownbits vector logical shift test In preparation for demandedelts support git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@286447 91177308-0d34-0410-b5e6-96231b3b80d8 --- test/CodeGen/X86/known-bits-vector.ll | 23 +++++++++++++++++++++++ 1 file changed, 23 insertions(+) diff --git a/test/CodeGen/X86/known-bits-vector.ll b/test/CodeGen/X86/known-bits-vector.ll index 0c21eb1cf3f..5f751edd4de 100644 --- a/test/CodeGen/X86/known-bits-vector.ll +++ b/test/CodeGen/X86/known-bits-vector.ll @@ -135,3 +135,26 @@ define <4 x float> @knownbits_mask_xor_shuffle_uitofp(<4 x i32> %a0) nounwind { %4 = uitofp <4 x i32> %3 to <4 x float> ret <4 x float> %4 } + +define <4 x i32> @knownbits_mask_shl_shuffle_lshr(<4 x i32> %a0) nounwind { +; X32-LABEL: knownbits_mask_shl_shuffle_lshr: +; X32: # BB#0: +; X32-NEXT: vpand {{\.LCPI.*}}, %xmm0, %xmm0 +; X32-NEXT: vpslld $17, %xmm0, %xmm0 +; X32-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[0,0,3,3] +; X32-NEXT: vpsrld $15, %xmm0, %xmm0 +; X32-NEXT: retl +; +; X64-LABEL: knownbits_mask_shl_shuffle_lshr: +; X64: # BB#0: +; X64-NEXT: vpand {{.*}}(%rip), %xmm0, %xmm0 +; X64-NEXT: vpslld $17, %xmm0, %xmm0 +; X64-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[0,0,3,3] +; X64-NEXT: vpsrld $15, %xmm0, %xmm0 +; X64-NEXT: retq + %1 = and <4 x i32> %a0, + %2 = shl <4 x i32> %1, + %3 = shufflevector <4 x i32> %2, <4 x i32> undef, <4 x i32> + %4 = lshr <4 x i32> %3, + ret <4 x i32> %4 +} -- 2.40.0