From 60b311224d0cc06d05d0380c8becb275fa7f16d0 Mon Sep 17 00:00:00 2001 From: Daniel Sanders Date: Mon, 30 Sep 2019 20:55:53 +0000 Subject: [PATCH] [globalisel][knownbits] Allow targets to call GISelKnownBits::computeKnownBitsImpl() Summary: It seems we missed that the target hook can't query the known-bits for the inputs to a target instruction. Fix that oversight Reviewers: aditya_nandakumar Subscribers: rovka, hiraditya, volkan, Petar.Avramovic, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D67380 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@373264 91177308-0d34-0410-b5e6-96231b3b80d8 --- include/llvm/CodeGen/TargetLowering.h | 4 +++- lib/CodeGen/GlobalISel/GISelKnownBits.cpp | 3 ++- lib/CodeGen/SelectionDAG/TargetLowering.cpp | 5 +++-- 3 files changed, 8 insertions(+), 4 deletions(-) diff --git a/include/llvm/CodeGen/TargetLowering.h b/include/llvm/CodeGen/TargetLowering.h index 0e9c19a2597..4037587b249 100644 --- a/include/llvm/CodeGen/TargetLowering.h +++ b/include/llvm/CodeGen/TargetLowering.h @@ -73,6 +73,7 @@ class Constant; class FastISel; class FunctionLoweringInfo; class GlobalValue; +class GISelKnownBits; class IntrinsicInst; struct KnownBits; class LLVMContext; @@ -3167,7 +3168,8 @@ public: /// or one and return them in the KnownZero/KnownOne bitsets. The DemandedElts /// argument allows us to only collect the known bits that are shared by the /// requested vector elements. This is for GISel. - virtual void computeKnownBitsForTargetInstr(Register R, KnownBits &Known, + virtual void computeKnownBitsForTargetInstr(GISelKnownBits &Analysis, + Register R, KnownBits &Known, const APInt &DemandedElts, const MachineRegisterInfo &MRI, unsigned Depth = 0) const; diff --git a/lib/CodeGen/GlobalISel/GISelKnownBits.cpp b/lib/CodeGen/GlobalISel/GISelKnownBits.cpp index c0391f7771f..8f9b7ddeabf 100644 --- a/lib/CodeGen/GlobalISel/GISelKnownBits.cpp +++ b/lib/CodeGen/GlobalISel/GISelKnownBits.cpp @@ -119,7 +119,8 @@ void GISelKnownBits::computeKnownBitsImpl(Register R, KnownBits &Known, switch (Opcode) { default: - TL.computeKnownBitsForTargetInstr(R, Known, DemandedElts, MRI, Depth); + TL.computeKnownBitsForTargetInstr(*this, R, Known, DemandedElts, MRI, + Depth); break; case TargetOpcode::COPY: { MachineOperand Dst = MI.getOperand(0); diff --git a/lib/CodeGen/SelectionDAG/TargetLowering.cpp b/lib/CodeGen/SelectionDAG/TargetLowering.cpp index d7286a2789b..09c45f644e1 100644 --- a/lib/CodeGen/SelectionDAG/TargetLowering.cpp +++ b/lib/CodeGen/SelectionDAG/TargetLowering.cpp @@ -2589,8 +2589,9 @@ void TargetLowering::computeKnownBitsForTargetNode(const SDValue Op, } void TargetLowering::computeKnownBitsForTargetInstr( - Register R, KnownBits &Known, const APInt &DemandedElts, - const MachineRegisterInfo &MRI, unsigned Depth) const { + GISelKnownBits &Analysis, Register R, KnownBits &Known, + const APInt &DemandedElts, const MachineRegisterInfo &MRI, + unsigned Depth) const { Known.resetAll(); } -- 2.50.1