From 5e15d64948bd00cd2752fcd97ce7adf4a5c9b051 Mon Sep 17 00:00:00 2001 From: Pirama Arumuga Nainar Date: Tue, 17 Mar 2015 23:10:29 +0000 Subject: [PATCH] Fix bug while building FP16 constant vectors for AArch64 Summary: Building FP16 constant vectors caused the FP16 data to be bitcast to i64. This patch creates a BITCAST node with the correct value, and adds a test to verify correct handling. Reviewers: mcrosier Reviewed By: mcrosier Subscribers: mcrosier, jmolloy, ab, srhines, llvm-commits, rengolin, aemerson Differential Revision: http://reviews.llvm.org/D8369 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232562 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/Target/AArch64/AArch64ISelLowering.cpp | 6 ++++-- test/CodeGen/AArch64/fp16-v4-instructions.ll | 9 +++++++++ 2 files changed, 13 insertions(+), 2 deletions(-) diff --git a/lib/Target/AArch64/AArch64ISelLowering.cpp b/lib/Target/AArch64/AArch64ISelLowering.cpp index 464f56780df..93387b00e22 100644 --- a/lib/Target/AArch64/AArch64ISelLowering.cpp +++ b/lib/Target/AArch64/AArch64ISelLowering.cpp @@ -5892,8 +5892,10 @@ FailedModImm: if (VT.getVectorElementType().isFloatingPoint()) { SmallVector Ops; - MVT NewType = - (VT.getVectorElementType() == MVT::f32) ? MVT::i32 : MVT::i64; + EVT EltTy = VT.getVectorElementType(); + assert ((EltTy == MVT::f16 || EltTy == MVT::f32 || EltTy == MVT::f64) && + "Unsupported floating-point vector type"); + MVT NewType = MVT::getIntegerVT(EltTy.getSizeInBits()); for (unsigned i = 0; i < NumElts; ++i) Ops.push_back(DAG.getNode(ISD::BITCAST, dl, NewType, Op.getOperand(i))); EVT VecVT = EVT::getVectorVT(*DAG.getContext(), NewType, NumElts); diff --git a/test/CodeGen/AArch64/fp16-v4-instructions.ll b/test/CodeGen/AArch64/fp16-v4-instructions.ll index f2945a1a072..6db4e9745da 100644 --- a/test/CodeGen/AArch64/fp16-v4-instructions.ll +++ b/test/CodeGen/AArch64/fp16-v4-instructions.ll @@ -12,6 +12,15 @@ entry: } +define <4 x half> @build_h4(<4 x half> %a) { +entry: +; CHECK-LABEL: build_h4: +; CHECK: movz [[GPR:w[0-9]+]], #0x3ccd +; CHECK: dup v0.4h, [[GPR]] + ret <4 x half> +} + + define <4 x half> @sub_h(<4 x half> %a, <4 x half> %b) { entry: ; CHECK-LABEL: sub_h: -- 2.40.0