From 5d261ccfa072164e683c828d1344ca61542b29b6 Mon Sep 17 00:00:00 2001 From: Hans Wennborg Date: Fri, 9 Aug 2019 09:40:09 +0000 Subject: [PATCH] Merging r367403: ------------------------------------------------------------------------ r367403 | lenary | 2019-07-31 11:45:55 +0200 (Wed, 31 Jul 2019) | 20 lines [RISCV] Support 'f' Inline Assembly Constraint Summary: This adds the 'f' inline assembly constraint, as supported by GCC. An 'f'-constrained operand is passed in a floating point register. Exactly which kind of floating-point register (32-bit or 64-bit) is decided based on the operand type and the available standard extensions (-f and -d, respectively). This patch adds support in both the clang frontend, and LLVM itself. Reviewers: asb, lewis-revill Reviewed By: asb Subscribers: hiraditya, rbar, johnrusso, simoncook, apazos, sabuasal, niosHD, kito-cheng, shiva0217, jrtc27, MaskRay, zzheng, edward-jones, rogfer01, MartinMosbeck, brucehoult, the_o, rkruppe, PkmX, jocewei, psnobl, benna, Jim, s.egerton, cfe-commits, llvm-commits Tags: #clang, #llvm Differential Revision: https://reviews.llvm.org/D65500 ------------------------------------------------------------------------ git-svn-id: https://llvm.org/svn/llvm-project/cfe/branches/release_90@368420 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/Basic/Targets/RISCV.cpp | 4 ++++ test/CodeGen/riscv-inline-asm.c | 12 ++++++++++++ 2 files changed, 16 insertions(+) diff --git a/lib/Basic/Targets/RISCV.cpp b/lib/Basic/Targets/RISCV.cpp index 58272d14ab..939ac46d67 100644 --- a/lib/Basic/Targets/RISCV.cpp +++ b/lib/Basic/Targets/RISCV.cpp @@ -56,6 +56,10 @@ bool RISCVTargetInfo::validateAsmConstraint( // A 5-bit unsigned immediate for CSR access instructions. Info.setRequiresImmediate(0, 31); return true; + case 'f': + // A floating-point register. + Info.setAllowsRegister(); + return true; } } diff --git a/test/CodeGen/riscv-inline-asm.c b/test/CodeGen/riscv-inline-asm.c index 2d23b7e35e..f79527337b 100644 --- a/test/CodeGen/riscv-inline-asm.c +++ b/test/CodeGen/riscv-inline-asm.c @@ -26,3 +26,15 @@ void test_K() { // CHECK: call void asm sideeffect "", "K"(i32 0) asm volatile ("" :: "K"(0)); } + +float f; +double d; +void test_f() { +// CHECK-LABEL: define void @test_f() +// CHECK: [[FLT_ARG:%[a-zA-Z_0-9]+]] = load float, float* @f +// CHECK: call void asm sideeffect "", "f"(float [[FLT_ARG]]) + asm volatile ("" :: "f"(f)); +// CHECK: [[FLT_ARG:%[a-zA-Z_0-9]+]] = load double, double* @d +// CHECK: call void asm sideeffect "", "f"(double [[FLT_ARG]]) + asm volatile ("" :: "f"(d)); +} -- 2.40.0