From 5c985bdbe2bc0bf9c40b7b3125b19a54ee6498b5 Mon Sep 17 00:00:00 2001
From: Krzysztof Parzyszek <kparzysz@codeaurora.org>
Date: Wed, 9 Aug 2017 21:22:05 +0000
Subject: [PATCH] [Hexagon] Ignore DBG_VALUEs when counting instructions in
 hexagon-early-if

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@310524 91177308-0d34-0410-b5e6-96231b3b80d8
---
 lib/Target/Hexagon/HexagonEarlyIfConv.cpp   | 11 +++--
 lib/Target/Hexagon/HexagonTargetMachine.cpp |  2 +
 test/CodeGen/Hexagon/early-if-debug.mir     | 53 +++++++++++++++++++++
 3 files changed, 61 insertions(+), 5 deletions(-)
 create mode 100644 test/CodeGen/Hexagon/early-if-debug.mir

diff --git a/lib/Target/Hexagon/HexagonEarlyIfConv.cpp b/lib/Target/Hexagon/HexagonEarlyIfConv.cpp
index 7d0878815a1..fdf57a82cbd 100644
--- a/lib/Target/Hexagon/HexagonEarlyIfConv.cpp
+++ b/lib/Target/Hexagon/HexagonEarlyIfConv.cpp
@@ -155,9 +155,7 @@ namespace {
   public:
     static char ID;
 
-    HexagonEarlyIfConversion() : MachineFunctionPass(ID) {
-      initializeHexagonEarlyIfConversionPass(*PassRegistry::getPassRegistry());
-    }
+    HexagonEarlyIfConversion() : MachineFunctionPass(ID) {}
 
     StringRef getPassName() const override {
       return "Hexagon early if conversion";
@@ -227,7 +225,7 @@ namespace {
 
 char HexagonEarlyIfConversion::ID = 0;
 
-INITIALIZE_PASS(HexagonEarlyIfConversion, "hexagon-eif",
+INITIALIZE_PASS(HexagonEarlyIfConversion, "hexagon-early-if",
   "Hexagon early if conversion", false, false)
 
 bool HexagonEarlyIfConversion::isPreheader(const MachineBasicBlock *B) const {
@@ -539,7 +537,10 @@ bool HexagonEarlyIfConversion::isProfitable(const FlowPattern &FP) const {
   auto TotalCount = [] (const MachineBasicBlock *B, unsigned &Spare) {
     if (!B)
       return 0u;
-    unsigned T = std::distance(B->begin(), B->getFirstTerminator());
+    unsigned T = std::count_if(B->begin(), B->getFirstTerminator(),
+                               [](const MachineInstr &MI) {
+                                 return !MI.isDebugValue();
+                               });
     if (T < HEXAGON_PACKET_SIZE)
       Spare += HEXAGON_PACKET_SIZE-T;
     return T;
diff --git a/lib/Target/Hexagon/HexagonTargetMachine.cpp b/lib/Target/Hexagon/HexagonTargetMachine.cpp
index 543318c7a14..01634756d0a 100644
--- a/lib/Target/Hexagon/HexagonTargetMachine.cpp
+++ b/lib/Target/Hexagon/HexagonTargetMachine.cpp
@@ -109,6 +109,7 @@ SchedCustomRegistry("hexagon", "Run Hexagon's custom scheduler",
 
 namespace llvm {
   extern char &HexagonExpandCondsetsID;
+  void initializeHexagonEarlyIfConversionPass(PassRegistry&);
   void initializeHexagonExpandCondsetsPass(PassRegistry&);
   void initializeHexagonGenMuxPass(PassRegistry&);
   void initializeHexagonLoopIdiomRecognizePass(PassRegistry&);
@@ -163,6 +164,7 @@ extern "C" void LLVMInitializeHexagonTarget() {
   RegisterTargetMachine<HexagonTargetMachine> X(getTheHexagonTarget());
 
   PassRegistry &PR = *PassRegistry::getPassRegistry();
+  initializeHexagonEarlyIfConversionPass(PR);
   initializeHexagonGenMuxPass(PR);
   initializeHexagonLoopIdiomRecognizePass(PR);
   initializeHexagonNewValueJumpPass(PR);
diff --git a/test/CodeGen/Hexagon/early-if-debug.mir b/test/CodeGen/Hexagon/early-if-debug.mir
new file mode 100644
index 00000000000..39b5036f810
--- /dev/null
+++ b/test/CodeGen/Hexagon/early-if-debug.mir
@@ -0,0 +1,53 @@
+# RUN: llc -march=hexagon -eif-limit=4 -run-pass hexagon-early-if -o - %s | FileCheck %s
+# Check that even with the limit of 4 instructions, the block bb.1 is
+# if-converted.
+
+# CHECK-LABEL: bb.0:
+# CHECK: %0 = COPY %r0
+# CHECK: %1 = C2_cmpeqi %0, 0
+# CHECK: %2 = A2_tfrsi 123
+# CHECK: DBG_VALUE debug-use %0, debug-use _
+# CHECK: DBG_VALUE debug-use %0, debug-use _
+# CHECK: DBG_VALUE debug-use %0, debug-use _
+# CHECK: DBG_VALUE debug-use %0, debug-use _
+# CHECK: DBG_VALUE debug-use %0, debug-use _
+# CHECK: %3 = A2_tfrsi 321
+# CHECK: %5 = C2_mux %1, %2, %3
+
+--- |
+  define void @foo() {
+    ret void
+  }
+  !1 = !DIExpression()
+...
+---
+name: foo
+tracksRegLiveness: true
+registers:
+  - { id: 0, class: intregs }
+  - { id: 1, class: predregs }
+  - { id: 2, class: intregs }
+  - { id: 3, class: intregs }
+  - { id: 4, class: intregs }
+body:             |
+  bb.0:
+    liveins: %r0
+
+    %0 = COPY %r0
+    %1 = C2_cmpeqi %0, 0
+    %2 = A2_tfrsi 123
+    J2_jumpt %1, %bb.2, implicit-def dead %pc
+    J2_jump %bb.1, implicit-def dead %pc
+
+  bb.1:
+    DBG_VALUE debug-use %0, debug-use _, !1, !1
+    DBG_VALUE debug-use %0, debug-use _, !1, !1
+    DBG_VALUE debug-use %0, debug-use _, !1, !1
+    DBG_VALUE debug-use %0, debug-use _, !1, !1
+    DBG_VALUE debug-use %0, debug-use _, !1, !1
+    %3 = A2_tfrsi 321
+
+  bb.2:
+    %4 = PHI %2, %bb.0, %3, %bb.1
+
+...
-- 
2.40.0