From 56c4b1ef06c4c710b1ee7c4b9de3092825121c11 Mon Sep 17 00:00:00 2001 From: Kristof Beyls Date: Thu, 19 Jan 2017 13:32:14 +0000 Subject: [PATCH] [GlobalISel] Pointers are legal operands for G_SELECT on AArch64 Differential Revision: https://reviews.llvm.org/D28805 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@292481 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/Target/AArch64/AArch64InstructionSelector.cpp | 2 +- lib/Target/AArch64/AArch64LegalizerInfo.cpp | 2 +- .../AArch64/GlobalISel/arm64-instructionselect.mir | 12 ++++++++++++ 3 files changed, 14 insertions(+), 2 deletions(-) diff --git a/lib/Target/AArch64/AArch64InstructionSelector.cpp b/lib/Target/AArch64/AArch64InstructionSelector.cpp index f8565379998..3163f6e5228 100644 --- a/lib/Target/AArch64/AArch64InstructionSelector.cpp +++ b/lib/Target/AArch64/AArch64InstructionSelector.cpp @@ -1026,7 +1026,7 @@ bool AArch64InstructionSelector::select(MachineInstr &I) const { if (Ty == LLT::scalar(32)) { CSelOpc = AArch64::CSELWr; - } else if (Ty == LLT::scalar(64)) { + } else if (Ty == LLT::scalar(64) || Ty == LLT::pointer(0, 64)) { CSelOpc = AArch64::CSELXr; } else { return false; diff --git a/lib/Target/AArch64/AArch64LegalizerInfo.cpp b/lib/Target/AArch64/AArch64LegalizerInfo.cpp index 83f276a8161..48838f28b4b 100644 --- a/lib/Target/AArch64/AArch64LegalizerInfo.cpp +++ b/lib/Target/AArch64/AArch64LegalizerInfo.cpp @@ -160,7 +160,7 @@ AArch64LegalizerInfo::AArch64LegalizerInfo() { setAction({G_BRCOND, Ty}, Legal); // Select - for (auto Ty : {s1, s8, s16, s32, s64}) + for (auto Ty : {s1, s8, s16, s32, s64, p0}) setAction({G_SELECT, Ty}, Legal); setAction({G_SELECT, 1, s1}, Legal); diff --git a/test/CodeGen/AArch64/GlobalISel/arm64-instructionselect.mir b/test/CodeGen/AArch64/GlobalISel/arm64-instructionselect.mir index b443303eaf5..9c7b73052a3 100644 --- a/test/CodeGen/AArch64/GlobalISel/arm64-instructionselect.mir +++ b/test/CodeGen/AArch64/GlobalISel/arm64-instructionselect.mir @@ -2950,6 +2950,9 @@ tracksRegLiveness: true # CHECK-NEXT: - { id: 4, class: gpr64 } # CHECK-NEXT: - { id: 5, class: gpr64 } # CHECK-NEXT: - { id: 6, class: gpr64 } +# CHECK-NEXT: - { id: 7, class: gpr64 } +# CHECK-NEXT: - { id: 8, class: gpr64 } +# CHECK-NEXT: - { id: 9, class: gpr64 } registers: - { id: 0, class: gpr } - { id: 1, class: gpr } @@ -2958,12 +2961,17 @@ registers: - { id: 4, class: gpr } - { id: 5, class: gpr } - { id: 6, class: gpr } + - { id: 7, class: gpr } + - { id: 8, class: gpr } + - { id: 9, class: gpr } # CHECK: body: # CHECK: %wzr = ANDSWri %0, 0, implicit-def %nzcv # CHECK: %3 = CSELWr %1, %2, 1, implicit %nzcv # CHECK: %wzr = ANDSWri %0, 0, implicit-def %nzcv # CHECK: %6 = CSELXr %4, %5, 1, implicit %nzcv +# CHECK: %wzr = ANDSWri %0, 0, implicit-def %nzcv +# CHECK: %9 = CSELXr %7, %8, 1, implicit %nzcv body: | bb.0: liveins: %w0, %w1, %w2 @@ -2976,4 +2984,8 @@ body: | %4(s64) = COPY %x0 %5(s64) = COPY %x1 %6(s64) = G_SELECT %0, %4, %5 + + %7(p0) = COPY %x0 + %8(p0) = COPY %x1 + %9(p0) = G_SELECT %0, %7, %8 ... -- 2.40.0