From 4e3a6970073f13bf3509466b4c5e35f64b85bfde Mon Sep 17 00:00:00 2001 From: Craig Topper Date: Tue, 1 Aug 2017 16:45:11 +0000 Subject: [PATCH] [X86] Split bmi.ll into a bmi test and a bmi2 test. This moves all the bmi2 specific intrinsics to a separate test file and adds a bmi1 only command line to the existing bmi test. This will allow us to see the missed opportunity to use bextr to handle 64-bit 'and' with a large mask. This will be improved in an upcoming patch. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@309700 91177308-0d34-0410-b5e6-96231b3b80d8 --- test/CodeGen/X86/bmi.ll | 313 ++++++++++++++++++++------------------- test/CodeGen/X86/bmi2.ll | 99 +++++++++++++ 2 files changed, 262 insertions(+), 150 deletions(-) create mode 100644 test/CodeGen/X86/bmi2.ll diff --git a/test/CodeGen/X86/bmi.ll b/test/CodeGen/X86/bmi.ll index 730635f7f9f..a7dbd8bdf99 100644 --- a/test/CodeGen/X86/bmi.ll +++ b/test/CodeGen/X86/bmi.ll @@ -1,5 +1,6 @@ ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py -; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+bmi,+bmi2 | FileCheck %s +; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+bmi | FileCheck %s --check-prefix=CHECK --check-prefix=BMI1 +; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+bmi,+bmi2 | FileCheck %s --check-prefix=CHECK --check-prefix=BMI2 declare i8 @llvm.cttz.i8(i8, i1) declare i16 @llvm.cttz.i16(i16, i1) @@ -382,43 +383,20 @@ entry: ret i64 %and } -define i32 @bzhi32(i32 %x, i32 %y) { -; CHECK-LABEL: bzhi32: -; CHECK: # BB#0: -; CHECK-NEXT: bzhil %esi, %edi, %eax -; CHECK-NEXT: retq - %tmp = tail call i32 @llvm.x86.bmi.bzhi.32(i32 %x, i32 %y) - ret i32 %tmp -} - -define i32 @bzhi32_load(i32* %x, i32 %y) { -; CHECK-LABEL: bzhi32_load: -; CHECK: # BB#0: -; CHECK-NEXT: bzhil %esi, (%rdi), %eax -; CHECK-NEXT: retq - %x1 = load i32, i32* %x - %tmp = tail call i32 @llvm.x86.bmi.bzhi.32(i32 %x1, i32 %y) - ret i32 %tmp -} - -declare i32 @llvm.x86.bmi.bzhi.32(i32, i32) - -define i64 @bzhi64(i64 %x, i64 %y) { -; CHECK-LABEL: bzhi64: -; CHECK: # BB#0: -; CHECK-NEXT: bzhiq %rsi, %rdi, %rax -; CHECK-NEXT: retq - %tmp = tail call i64 @llvm.x86.bmi.bzhi.64(i64 %x, i64 %y) - ret i64 %tmp -} - -declare i64 @llvm.x86.bmi.bzhi.64(i64, i64) - define i32 @bzhi32b(i32 %x, i8 zeroext %index) { -; CHECK-LABEL: bzhi32b: -; CHECK: # BB#0: # %entry -; CHECK-NEXT: bzhil %esi, %edi, %eax -; CHECK-NEXT: retq +; BMI1-LABEL: bzhi32b: +; BMI1: # BB#0: # %entry +; BMI1-NEXT: movl $1, %eax +; BMI1-NEXT: movl %esi, %ecx +; BMI1-NEXT: shll %cl, %eax +; BMI1-NEXT: decl %eax +; BMI1-NEXT: andl %edi, %eax +; BMI1-NEXT: retq +; +; BMI2-LABEL: bzhi32b: +; BMI2: # BB#0: # %entry +; BMI2-NEXT: bzhil %esi, %edi, %eax +; BMI2-NEXT: retq entry: %conv = zext i8 %index to i32 %shl = shl i32 1, %conv @@ -428,10 +406,19 @@ entry: } define i32 @bzhi32b_load(i32* %w, i8 zeroext %index) { -; CHECK-LABEL: bzhi32b_load: -; CHECK: # BB#0: # %entry -; CHECK-NEXT: bzhil %esi, (%rdi), %eax -; CHECK-NEXT: retq +; BMI1-LABEL: bzhi32b_load: +; BMI1: # BB#0: # %entry +; BMI1-NEXT: movl $1, %eax +; BMI1-NEXT: movl %esi, %ecx +; BMI1-NEXT: shll %cl, %eax +; BMI1-NEXT: decl %eax +; BMI1-NEXT: andl (%rdi), %eax +; BMI1-NEXT: retq +; +; BMI2-LABEL: bzhi32b_load: +; BMI2: # BB#0: # %entry +; BMI2-NEXT: bzhil %esi, (%rdi), %eax +; BMI2-NEXT: retq entry: %x = load i32, i32* %w %conv = zext i8 %index to i32 @@ -442,10 +429,19 @@ entry: } define i32 @bzhi32c(i32 %x, i8 zeroext %index) { -; CHECK-LABEL: bzhi32c: -; CHECK: # BB#0: # %entry -; CHECK-NEXT: bzhil %esi, %edi, %eax -; CHECK-NEXT: retq +; BMI1-LABEL: bzhi32c: +; BMI1: # BB#0: # %entry +; BMI1-NEXT: movl $1, %eax +; BMI1-NEXT: movl %esi, %ecx +; BMI1-NEXT: shll %cl, %eax +; BMI1-NEXT: decl %eax +; BMI1-NEXT: andl %edi, %eax +; BMI1-NEXT: retq +; +; BMI2-LABEL: bzhi32c: +; BMI2: # BB#0: # %entry +; BMI2-NEXT: bzhil %esi, %edi, %eax +; BMI2-NEXT: retq entry: %conv = zext i8 %index to i32 %shl = shl i32 1, %conv @@ -455,10 +451,20 @@ entry: } define i32 @bzhi32d(i32 %a, i32 %b) { -; CHECK-LABEL: bzhi32d: -; CHECK: # BB#0: # %entry -; CHECK-NEXT: bzhil %esi, %edi, %eax -; CHECK-NEXT: retq +; BMI1-LABEL: bzhi32d: +; BMI1: # BB#0: # %entry +; BMI1-NEXT: movl $32, %ecx +; BMI1-NEXT: subl %esi, %ecx +; BMI1-NEXT: movl $-1, %eax +; BMI1-NEXT: # kill: %CL %CL %ECX +; BMI1-NEXT: shrl %cl, %eax +; BMI1-NEXT: andl %edi, %eax +; BMI1-NEXT: retq +; +; BMI2-LABEL: bzhi32d: +; BMI2: # BB#0: # %entry +; BMI2-NEXT: bzhil %esi, %edi, %eax +; BMI2-NEXT: retq entry: %sub = sub i32 32, %b %shr = lshr i32 -1, %sub @@ -467,10 +473,20 @@ entry: } define i32 @bzhi32e(i32 %a, i32 %b) { -; CHECK-LABEL: bzhi32e: -; CHECK: # BB#0: # %entry -; CHECK-NEXT: bzhil %esi, %edi, %eax -; CHECK-NEXT: retq +; BMI1-LABEL: bzhi32e: +; BMI1: # BB#0: # %entry +; BMI1-NEXT: movl $32, %ecx +; BMI1-NEXT: subl %esi, %ecx +; BMI1-NEXT: shll %cl, %edi +; BMI1-NEXT: # kill: %CL %CL %ECX +; BMI1-NEXT: shrl %cl, %edi +; BMI1-NEXT: movl %edi, %eax +; BMI1-NEXT: retq +; +; BMI2-LABEL: bzhi32e: +; BMI2: # BB#0: # %entry +; BMI2-NEXT: bzhil %esi, %edi, %eax +; BMI2-NEXT: retq entry: %sub = sub i32 32, %b %shl = shl i32 %a, %sub @@ -479,11 +495,20 @@ entry: } define i64 @bzhi64b(i64 %x, i8 zeroext %index) { -; CHECK-LABEL: bzhi64b: -; CHECK: # BB#0: # %entry -; CHECK-NEXT: # kill: %ESI %ESI %RSI -; CHECK-NEXT: bzhiq %rsi, %rdi, %rax -; CHECK-NEXT: retq +; BMI1-LABEL: bzhi64b: +; BMI1: # BB#0: # %entry +; BMI1-NEXT: movl $1, %eax +; BMI1-NEXT: movl %esi, %ecx +; BMI1-NEXT: shlq %cl, %rax +; BMI1-NEXT: decq %rax +; BMI1-NEXT: andq %rdi, %rax +; BMI1-NEXT: retq +; +; BMI2-LABEL: bzhi64b: +; BMI2: # BB#0: # %entry +; BMI2-NEXT: # kill: %ESI %ESI %RSI +; BMI2-NEXT: bzhiq %rsi, %rdi, %rax +; BMI2-NEXT: retq entry: %conv = zext i8 %index to i64 %shl = shl i64 1, %conv @@ -493,10 +518,20 @@ entry: } define i64 @bzhi64c(i64 %a, i64 %b) { -; CHECK-LABEL: bzhi64c: -; CHECK: # BB#0: # %entry -; CHECK-NEXT: bzhiq %rsi, %rdi, %rax -; CHECK-NEXT: retq +; BMI1-LABEL: bzhi64c: +; BMI1: # BB#0: # %entry +; BMI1-NEXT: movl $64, %ecx +; BMI1-NEXT: subl %esi, %ecx +; BMI1-NEXT: movq $-1, %rax +; BMI1-NEXT: # kill: %CL %CL %ECX +; BMI1-NEXT: shrq %cl, %rax +; BMI1-NEXT: andq %rdi, %rax +; BMI1-NEXT: retq +; +; BMI2-LABEL: bzhi64c: +; BMI2: # BB#0: # %entry +; BMI2-NEXT: bzhiq %rsi, %rdi, %rax +; BMI2-NEXT: retq entry: %sub = sub i64 64, %b %shr = lshr i64 -1, %sub @@ -505,11 +540,21 @@ entry: } define i64 @bzhi64d(i64 %a, i32 %b) { -; CHECK-LABEL: bzhi64d: -; CHECK: # BB#0: # %entry -; CHECK-NEXT: # kill: %ESI %ESI %RSI -; CHECK-NEXT: bzhiq %rsi, %rdi, %rax -; CHECK-NEXT: retq +; BMI1-LABEL: bzhi64d: +; BMI1: # BB#0: # %entry +; BMI1-NEXT: movl $64, %ecx +; BMI1-NEXT: subl %esi, %ecx +; BMI1-NEXT: movq $-1, %rax +; BMI1-NEXT: # kill: %CL %CL %ECX +; BMI1-NEXT: shrq %cl, %rax +; BMI1-NEXT: andq %rdi, %rax +; BMI1-NEXT: retq +; +; BMI2-LABEL: bzhi64d: +; BMI2: # BB#0: # %entry +; BMI2-NEXT: # kill: %ESI %ESI %RSI +; BMI2-NEXT: bzhiq %rsi, %rdi, %rax +; BMI2-NEXT: retq entry: %sub = sub i32 64, %b %sh_prom = zext i32 %sub to i64 @@ -519,10 +564,20 @@ entry: } define i64 @bzhi64e(i64 %a, i64 %b) { -; CHECK-LABEL: bzhi64e: -; CHECK: # BB#0: # %entry -; CHECK-NEXT: bzhiq %rsi, %rdi, %rax -; CHECK-NEXT: retq +; BMI1-LABEL: bzhi64e: +; BMI1: # BB#0: # %entry +; BMI1-NEXT: movl $64, %ecx +; BMI1-NEXT: subl %esi, %ecx +; BMI1-NEXT: shlq %cl, %rdi +; BMI1-NEXT: # kill: %CL %CL %ECX +; BMI1-NEXT: shrq %cl, %rdi +; BMI1-NEXT: movq %rdi, %rax +; BMI1-NEXT: retq +; +; BMI2-LABEL: bzhi64e: +; BMI2: # BB#0: # %entry +; BMI2-NEXT: bzhiq %rsi, %rdi, %rax +; BMI2-NEXT: retq entry: %sub = sub i64 64, %b %shl = shl i64 %a, %sub @@ -531,11 +586,21 @@ entry: } define i64 @bzhi64f(i64 %a, i32 %b) { -; CHECK-LABEL: bzhi64f: -; CHECK: # BB#0: # %entry -; CHECK-NEXT: # kill: %ESI %ESI %RSI -; CHECK-NEXT: bzhiq %rsi, %rdi, %rax -; CHECK-NEXT: retq +; BMI1-LABEL: bzhi64f: +; BMI1: # BB#0: # %entry +; BMI1-NEXT: movl $64, %ecx +; BMI1-NEXT: subl %esi, %ecx +; BMI1-NEXT: shlq %cl, %rdi +; BMI1-NEXT: # kill: %CL %CL %ECX +; BMI1-NEXT: shrq %cl, %rdi +; BMI1-NEXT: movq %rdi, %rax +; BMI1-NEXT: retq +; +; BMI2-LABEL: bzhi64f: +; BMI2: # BB#0: # %entry +; BMI2-NEXT: # kill: %ESI %ESI %RSI +; BMI2-NEXT: bzhiq %rsi, %rdi, %rax +; BMI2-NEXT: retq entry: %sub = sub i32 64, %b %sh_prom = zext i32 %sub to i64 @@ -545,22 +610,34 @@ entry: } define i64 @bzhi64_constant_mask(i64 %x) { -; CHECK-LABEL: bzhi64_constant_mask: -; CHECK: # BB#0: # %entry -; CHECK-NEXT: movb $62, %al -; CHECK-NEXT: bzhiq %rax, %rdi, %rax -; CHECK-NEXT: retq +; BMI1-LABEL: bzhi64_constant_mask: +; BMI1: # BB#0: # %entry +; BMI1-NEXT: movabsq $4611686018427387903, %rax # imm = 0x3FFFFFFFFFFFFFFF +; BMI1-NEXT: andq %rdi, %rax +; BMI1-NEXT: retq +; +; BMI2-LABEL: bzhi64_constant_mask: +; BMI2: # BB#0: # %entry +; BMI2-NEXT: movb $62, %al +; BMI2-NEXT: bzhiq %rax, %rdi, %rax +; BMI2-NEXT: retq entry: %and = and i64 %x, 4611686018427387903 ret i64 %and } define i64 @bzhi64_constant_mask_load(i64* %x) { -; CHECK-LABEL: bzhi64_constant_mask_load: -; CHECK: # BB#0: # %entry -; CHECK-NEXT: movb $62, %al -; CHECK-NEXT: bzhiq %rax, (%rdi), %rax -; CHECK-NEXT: retq +; BMI1-LABEL: bzhi64_constant_mask_load: +; BMI1: # BB#0: # %entry +; BMI1-NEXT: movabsq $4611686018427387903, %rax # imm = 0x3FFFFFFFFFFFFFFF +; BMI1-NEXT: andq (%rdi), %rax +; BMI1-NEXT: retq +; +; BMI2-LABEL: bzhi64_constant_mask_load: +; BMI2: # BB#0: # %entry +; BMI2-NEXT: movb $62, %al +; BMI2-NEXT: bzhiq %rax, (%rdi), %rax +; BMI2-NEXT: retq entry: %x1 = load i64, i64* %x %and = and i64 %x1, 4611686018427387903 @@ -671,67 +748,3 @@ define i64 @blsr64(i64 %x) { ret i64 %tmp2 } -define i32 @pdep32(i32 %x, i32 %y) { -; CHECK-LABEL: pdep32: -; CHECK: # BB#0: -; CHECK-NEXT: pdepl %esi, %edi, %eax -; CHECK-NEXT: retq - %tmp = tail call i32 @llvm.x86.bmi.pdep.32(i32 %x, i32 %y) - ret i32 %tmp -} - -define i32 @pdep32_load(i32 %x, i32* %y) { -; CHECK-LABEL: pdep32_load: -; CHECK: # BB#0: -; CHECK-NEXT: pdepl (%rsi), %edi, %eax -; CHECK-NEXT: retq - %y1 = load i32, i32* %y - %tmp = tail call i32 @llvm.x86.bmi.pdep.32(i32 %x, i32 %y1) - ret i32 %tmp -} - -declare i32 @llvm.x86.bmi.pdep.32(i32, i32) - -define i64 @pdep64(i64 %x, i64 %y) { -; CHECK-LABEL: pdep64: -; CHECK: # BB#0: -; CHECK-NEXT: pdepq %rsi, %rdi, %rax -; CHECK-NEXT: retq - %tmp = tail call i64 @llvm.x86.bmi.pdep.64(i64 %x, i64 %y) - ret i64 %tmp -} - -declare i64 @llvm.x86.bmi.pdep.64(i64, i64) - -define i32 @pext32(i32 %x, i32 %y) { -; CHECK-LABEL: pext32: -; CHECK: # BB#0: -; CHECK-NEXT: pextl %esi, %edi, %eax -; CHECK-NEXT: retq - %tmp = tail call i32 @llvm.x86.bmi.pext.32(i32 %x, i32 %y) - ret i32 %tmp -} - -define i32 @pext32_load(i32 %x, i32* %y) { -; CHECK-LABEL: pext32_load: -; CHECK: # BB#0: -; CHECK-NEXT: pextl (%rsi), %edi, %eax -; CHECK-NEXT: retq - %y1 = load i32, i32* %y - %tmp = tail call i32 @llvm.x86.bmi.pext.32(i32 %x, i32 %y1) - ret i32 %tmp -} - -declare i32 @llvm.x86.bmi.pext.32(i32, i32) - -define i64 @pext64(i64 %x, i64 %y) { -; CHECK-LABEL: pext64: -; CHECK: # BB#0: -; CHECK-NEXT: pextq %rsi, %rdi, %rax -; CHECK-NEXT: retq - %tmp = tail call i64 @llvm.x86.bmi.pext.64(i64 %x, i64 %y) - ret i64 %tmp -} - -declare i64 @llvm.x86.bmi.pext.64(i64, i64) - diff --git a/test/CodeGen/X86/bmi2.ll b/test/CodeGen/X86/bmi2.ll new file mode 100644 index 00000000000..99a51a8183c --- /dev/null +++ b/test/CodeGen/X86/bmi2.ll @@ -0,0 +1,99 @@ +; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py +; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+bmi,+bmi2 | FileCheck %s + +define i32 @bzhi32(i32 %x, i32 %y) { +; CHECK-LABEL: bzhi32: +; CHECK: # BB#0: +; CHECK-NEXT: bzhil %esi, %edi, %eax +; CHECK-NEXT: retq + %tmp = tail call i32 @llvm.x86.bmi.bzhi.32(i32 %x, i32 %y) + ret i32 %tmp +} + +define i32 @bzhi32_load(i32* %x, i32 %y) { +; CHECK-LABEL: bzhi32_load: +; CHECK: # BB#0: +; CHECK-NEXT: bzhil %esi, (%rdi), %eax +; CHECK-NEXT: retq + %x1 = load i32, i32* %x + %tmp = tail call i32 @llvm.x86.bmi.bzhi.32(i32 %x1, i32 %y) + ret i32 %tmp +} + +declare i32 @llvm.x86.bmi.bzhi.32(i32, i32) + +define i64 @bzhi64(i64 %x, i64 %y) { +; CHECK-LABEL: bzhi64: +; CHECK: # BB#0: +; CHECK-NEXT: bzhiq %rsi, %rdi, %rax +; CHECK-NEXT: retq + %tmp = tail call i64 @llvm.x86.bmi.bzhi.64(i64 %x, i64 %y) + ret i64 %tmp +} + +declare i64 @llvm.x86.bmi.bzhi.64(i64, i64) + +define i32 @pdep32(i32 %x, i32 %y) { +; CHECK-LABEL: pdep32: +; CHECK: # BB#0: +; CHECK-NEXT: pdepl %esi, %edi, %eax +; CHECK-NEXT: retq + %tmp = tail call i32 @llvm.x86.bmi.pdep.32(i32 %x, i32 %y) + ret i32 %tmp +} + +define i32 @pdep32_load(i32 %x, i32* %y) { +; CHECK-LABEL: pdep32_load: +; CHECK: # BB#0: +; CHECK-NEXT: pdepl (%rsi), %edi, %eax +; CHECK-NEXT: retq + %y1 = load i32, i32* %y + %tmp = tail call i32 @llvm.x86.bmi.pdep.32(i32 %x, i32 %y1) + ret i32 %tmp +} + +declare i32 @llvm.x86.bmi.pdep.32(i32, i32) + +define i64 @pdep64(i64 %x, i64 %y) { +; CHECK-LABEL: pdep64: +; CHECK: # BB#0: +; CHECK-NEXT: pdepq %rsi, %rdi, %rax +; CHECK-NEXT: retq + %tmp = tail call i64 @llvm.x86.bmi.pdep.64(i64 %x, i64 %y) + ret i64 %tmp +} + +declare i64 @llvm.x86.bmi.pdep.64(i64, i64) + +define i32 @pext32(i32 %x, i32 %y) { +; CHECK-LABEL: pext32: +; CHECK: # BB#0: +; CHECK-NEXT: pextl %esi, %edi, %eax +; CHECK-NEXT: retq + %tmp = tail call i32 @llvm.x86.bmi.pext.32(i32 %x, i32 %y) + ret i32 %tmp +} + +define i32 @pext32_load(i32 %x, i32* %y) { +; CHECK-LABEL: pext32_load: +; CHECK: # BB#0: +; CHECK-NEXT: pextl (%rsi), %edi, %eax +; CHECK-NEXT: retq + %y1 = load i32, i32* %y + %tmp = tail call i32 @llvm.x86.bmi.pext.32(i32 %x, i32 %y1) + ret i32 %tmp +} + +declare i32 @llvm.x86.bmi.pext.32(i32, i32) + +define i64 @pext64(i64 %x, i64 %y) { +; CHECK-LABEL: pext64: +; CHECK: # BB#0: +; CHECK-NEXT: pextq %rsi, %rdi, %rax +; CHECK-NEXT: retq + %tmp = tail call i64 @llvm.x86.bmi.pext.64(i64 %x, i64 %y) + ret i64 %tmp +} + +declare i64 @llvm.x86.bmi.pext.64(i64, i64) + -- 2.40.0