From 4e00650f58ee86ce1df549b9bc111d860283b3c1 Mon Sep 17 00:00:00 2001 From: Aaron Watry Date: Fri, 17 Oct 2014 23:33:03 +0000 Subject: [PATCH] R600/SI: Add global atomicrmw xchg v2: Add separate offset/no-offset tests Signed-off-by: Aaron Watry Reviewed-by: Matt Arsenault git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@220110 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/Target/R600/AMDGPUInstructions.td | 1 + lib/Target/R600/SIInstructions.td | 3 + test/CodeGen/R600/global_atomics.ll | 80 +++++++++++++++++++++++++++ 3 files changed, 84 insertions(+) diff --git a/lib/Target/R600/AMDGPUInstructions.td b/lib/Target/R600/AMDGPUInstructions.td index 1562c2a0475..ca2245cd119 100644 --- a/lib/Target/R600/AMDGPUInstructions.td +++ b/lib/Target/R600/AMDGPUInstructions.td @@ -386,6 +386,7 @@ class global_binary_atomic_op : PatFrag< [{return cast(N)->getAddressSpace() == AMDGPUAS::GLOBAL_ADDRESS;}] >; +def atomic_swap_global : global_binary_atomic_op; def atomic_add_global : global_binary_atomic_op; def atomic_and_global : global_binary_atomic_op; def atomic_max_global : global_binary_atomic_op; diff --git a/lib/Target/R600/SIInstructions.td b/lib/Target/R600/SIInstructions.td index 0a8bb460e75..9d0cdf86f3c 100644 --- a/lib/Target/R600/SIInstructions.td +++ b/lib/Target/R600/SIInstructions.td @@ -896,6 +896,9 @@ defm BUFFER_STORE_DWORDX4 : MUBUF_Store_Helper < 0x0000001e, "BUFFER_STORE_DWORDX4", VReg_128, v4i32, global_store >; //def BUFFER_ATOMIC_SWAP : MUBUF_ <0x00000030, "BUFFER_ATOMIC_SWAP", []>; +defm BUFFER_ATOMIC_SWAP : MUBUF_Atomic < + 0x00000030, "BUFFER_ATOMIC_SWAP", VReg_32, i32, atomic_swap_global +>; //def BUFFER_ATOMIC_CMPSWAP : MUBUF_ <0x00000031, "BUFFER_ATOMIC_CMPSWAP", []>; defm BUFFER_ATOMIC_ADD : MUBUF_Atomic < 0x00000032, "BUFFER_ATOMIC_ADD", VReg_32, i32, atomic_add_global diff --git a/test/CodeGen/R600/global_atomics.ll b/test/CodeGen/R600/global_atomics.ll index 8d21dbdc793..255f9ebba4f 100644 --- a/test/CodeGen/R600/global_atomics.ll +++ b/test/CodeGen/R600/global_atomics.ll @@ -640,6 +640,86 @@ entry: ret void } +; FUNC-LABEL: {{^}}atomic_xchg_i32_offset: +; SI: BUFFER_ATOMIC_SWAP v{{[0-9]+}}, s[{{[0-9]+}}:{{[0-9]+}}], 0 offset:0x10{{$}} +define void @atomic_xchg_i32_offset(i32 addrspace(1)* %out, i32 %in) { +entry: + %gep = getelementptr i32 addrspace(1)* %out, i32 4 + %0 = atomicrmw volatile xchg i32 addrspace(1)* %gep, i32 %in seq_cst + ret void +} + +; FUNC-LABEL: {{^}}atomic_xchg_i32_ret_offset: +; SI: BUFFER_ATOMIC_SWAP [[RET:v[0-9]+]], s[{{[0-9]+}}:{{[0-9]+}}], 0 offset:0x10 glc {{$}} +; SI: BUFFER_STORE_DWORD [[RET]] +define void @atomic_xchg_i32_ret_offset(i32 addrspace(1)* %out, i32 addrspace(1)* %out2, i32 %in) { +entry: + %gep = getelementptr i32 addrspace(1)* %out, i32 4 + %0 = atomicrmw volatile xchg i32 addrspace(1)* %gep, i32 %in seq_cst + store i32 %0, i32 addrspace(1)* %out2 + ret void +} + +; FUNC-LABEL: {{^}}atomic_xchg_i32_addr64_offset: +; SI: BUFFER_ATOMIC_SWAP v{{[0-9]+}}, v[{{[0-9]+}}:{{[0-9]+}}], s[{{[0-9]+}}:{{[0-9]+}}], 0 addr64 offset:0x10{{$}} +define void @atomic_xchg_i32_addr64_offset(i32 addrspace(1)* %out, i32 %in, i64 %index) { +entry: + %ptr = getelementptr i32 addrspace(1)* %out, i64 %index + %gep = getelementptr i32 addrspace(1)* %ptr, i32 4 + %0 = atomicrmw volatile xchg i32 addrspace(1)* %gep, i32 %in seq_cst + ret void +} + +; FUNC-LABEL: {{^}}atomic_xchg_i32_ret_addr64_offset: +; SI: BUFFER_ATOMIC_SWAP [[RET:v[0-9]+]], v[{{[0-9]+}}:{{[0-9]+}}], s[{{[0-9]+}}:{{[0-9]+}}], 0 addr64 offset:0x10 glc{{$}} +; SI: BUFFER_STORE_DWORD [[RET]] +define void @atomic_xchg_i32_ret_addr64_offset(i32 addrspace(1)* %out, i32 addrspace(1)* %out2, i32 %in, i64 %index) { +entry: + %ptr = getelementptr i32 addrspace(1)* %out, i64 %index + %gep = getelementptr i32 addrspace(1)* %ptr, i32 4 + %0 = atomicrmw volatile xchg i32 addrspace(1)* %gep, i32 %in seq_cst + store i32 %0, i32 addrspace(1)* %out2 + ret void +} + +; FUNC-LABEL: {{^}}atomic_xchg_i32: +; SI: BUFFER_ATOMIC_SWAP v{{[0-9]+}}, s[{{[0-9]+}}:{{[0-9]+}}], 0{{$}} +define void @atomic_xchg_i32(i32 addrspace(1)* %out, i32 %in) { +entry: + %0 = atomicrmw volatile xchg i32 addrspace(1)* %out, i32 %in seq_cst + ret void +} + +; FUNC-LABEL: {{^}}atomic_xchg_i32_ret: +; SI: BUFFER_ATOMIC_SWAP [[RET:v[0-9]+]], s[{{[0-9]+}}:{{[0-9]+}}], 0 glc +; SI: BUFFER_STORE_DWORD [[RET]] +define void @atomic_xchg_i32_ret(i32 addrspace(1)* %out, i32 addrspace(1)* %out2, i32 %in) { +entry: + %0 = atomicrmw volatile xchg i32 addrspace(1)* %out, i32 %in seq_cst + store i32 %0, i32 addrspace(1)* %out2 + ret void +} + +; FUNC-LABEL: {{^}}atomic_xchg_i32_addr64: +; SI: BUFFER_ATOMIC_SWAP v{{[0-9]+}}, v[{{[0-9]+}}:{{[0-9]+}}], s[{{[0-9]+}}:{{[0-9]+}}], 0 addr64{{$}} +define void @atomic_xchg_i32_addr64(i32 addrspace(1)* %out, i32 %in, i64 %index) { +entry: + %ptr = getelementptr i32 addrspace(1)* %out, i64 %index + %0 = atomicrmw volatile xchg i32 addrspace(1)* %ptr, i32 %in seq_cst + ret void +} + +; FUNC-LABEL: {{^}}atomic_xchg_i32_ret_addr64: +; SI: BUFFER_ATOMIC_SWAP [[RET:v[0-9]+]], v[{{[0-9]+}}:{{[0-9]+}}], s[{{[0-9]+}}:{{[0-9]+}}], 0 addr64 glc{{$}} +; SI: BUFFER_STORE_DWORD [[RET]] +define void @atomic_xchg_i32_ret_addr64(i32 addrspace(1)* %out, i32 addrspace(1)* %out2, i32 %in, i64 %index) { +entry: + %ptr = getelementptr i32 addrspace(1)* %out, i64 %index + %0 = atomicrmw volatile xchg i32 addrspace(1)* %ptr, i32 %in seq_cst + store i32 %0, i32 addrspace(1)* %out2 + ret void +} + ; FUNC-LABEL: {{^}}atomic_xor_i32_offset: ; SI: BUFFER_ATOMIC_XOR v{{[0-9]+}}, s[{{[0-9]+}}:{{[0-9]+}}], 0 offset:0x10{{$}} define void @atomic_xor_i32_offset(i32 addrspace(1)* %out, i32 %in) { -- 2.40.0