From 4dde563ddf1ac3b4c80fa2a12949c92d2107c5f1 Mon Sep 17 00:00:00 2001 From: Craig Topper Date: Wed, 30 Aug 2017 05:00:35 +0000 Subject: [PATCH] [X86] Apply SlowIncDec feature to Sandybridge/Ivybridge CPUs as well Currently we start applying this on Haswell and newer. I don't believe anything changed in the Haswell architecture to make this the right cutoff point. The partial flag handling around this has been roughly the same since Sandybridge. Differential Revision: https://reviews.llvm.org/D37250 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@312099 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/Target/X86/X86.td | 4 ++-- test/CodeGen/X86/misched-fusion.ll | 2 +- test/CodeGen/X86/rdrand.ll | 4 ++-- 3 files changed, 5 insertions(+), 5 deletions(-) diff --git a/lib/Target/X86/X86.td b/lib/Target/X86/X86.td index 888af176a86..6856bd21670 100644 --- a/lib/Target/X86/X86.td +++ b/lib/Target/X86/X86.td @@ -528,6 +528,7 @@ def SNBFeatures : ProcessorFeatures<[], [ FeatureSlow3OpsLEA, FeatureFastScalarFSQRT, FeatureFastSHLDRotate, + FeatureSlowIncDec, FeatureMacroFusion ]>; @@ -560,8 +561,7 @@ def HSWFeatures : ProcessorFeatures; class HaswellProc : ProcModel