From 4ab19eac622a24d03e42cb268c8073a5ee7946b0 Mon Sep 17 00:00:00 2001 From: Yue Chen Date: Fri, 8 Jul 2016 16:47:19 -0700 Subject: [PATCH] Fix assertion failures in mips+msa setting Directly call c functions, otherwise when EXT_TX is enabled, hybrid transform other than combination of DCT/ADST has not been implemented, thus will cause assertion failures in the switch loops in vp10_fhtnxn_msa() and vp10_ihtnxn_nxn_add_msa(). BUG=webm:1239 Change-Id: I2379a07e5406f9489edcd2f3205682f679c9b091 --- vp10/common/vp10_rtcd_defs.pl | 34 ++++++++++++++++++++++++++++------ 1 file changed, 28 insertions(+), 6 deletions(-) diff --git a/vp10/common/vp10_rtcd_defs.pl b/vp10/common/vp10_rtcd_defs.pl index 5a415119a..369933d55 100644 --- a/vp10/common/vp10_rtcd_defs.pl +++ b/vp10/common/vp10_rtcd_defs.pl @@ -260,13 +260,24 @@ if (vpx_config("CONFIG_VP9_HIGHBITDEPTH") eq "yes") { specialize qw/vp10_fdct32x32_1/; } else { add_proto qw/void vp10_iht4x4_16_add/, "const tran_low_t *input, uint8_t *dest, int dest_stride, int tx_type"; - specialize qw/vp10_iht4x4_16_add sse2 neon dspr2 msa/; + specialize qw/vp10_iht4x4_16_add sse2 neon dspr2/; add_proto qw/void vp10_iht8x8_64_add/, "const tran_low_t *input, uint8_t *dest, int dest_stride, int tx_type"; - specialize qw/vp10_iht8x8_64_add sse2 neon dspr2 msa/; + specialize qw/vp10_iht8x8_64_add sse2 neon dspr2/; add_proto qw/void vp10_iht16x16_256_add/, "const tran_low_t *input, uint8_t *output, int pitch, int tx_type"; - specialize qw/vp10_iht16x16_256_add sse2 dspr2 msa/; + specialize qw/vp10_iht16x16_256_add sse2 dspr2/; + +if (!(vpx_config("CONFIG_VP10") eq "yes" && vpx_config("CONFIG_EXT_TX") eq "yes")) { + add_proto qw/void vp10_iht4x4_16_add/, "const tran_low_t *input, uint8_t *dest, int dest_stride, int tx_type"; + specialize qw/vp10_iht4x4_16_add msa/; + + add_proto qw/void vp10_iht8x8_64_add/, "const tran_low_t *input, uint8_t *dest, int dest_stride, int tx_type"; + specialize qw/vp10_iht8x8_64_add msa/; + + add_proto qw/void vp10_iht16x16_256_add/, "const tran_low_t *input, uint8_t *output, int pitch, int tx_type"; + specialize qw/vp10_iht16x16_256_add msa/; +} add_proto qw/void vp10_fdct4x4/, "const int16_t *input, tran_low_t *output, int stride"; specialize qw/vp10_fdct4x4 sse2/; @@ -437,13 +448,24 @@ if (vpx_config("CONFIG_VP9_HIGHBITDEPTH") eq "yes") { specialize qw/vp10_fwht4x4/, "$mmx_x86inc"; } else { add_proto qw/void vp10_fht4x4/, "const int16_t *input, tran_low_t *output, int stride, int tx_type"; - specialize qw/vp10_fht4x4 sse2 msa/; + specialize qw/vp10_fht4x4 sse2/; add_proto qw/void vp10_fht8x8/, "const int16_t *input, tran_low_t *output, int stride, int tx_type"; - specialize qw/vp10_fht8x8 sse2 msa/; + specialize qw/vp10_fht8x8 sse2/; add_proto qw/void vp10_fht16x16/, "const int16_t *input, tran_low_t *output, int stride, int tx_type"; - specialize qw/vp10_fht16x16 sse2 msa/; + specialize qw/vp10_fht16x16 sse2/; + +if (!(vpx_config("CONFIG_VP10") eq "yes" && vpx_config("CONFIG_EXT_TX") eq "yes")) { + add_proto qw/void vp10_fht4x4/, "const int16_t *input, tran_low_t *output, int stride, int tx_type"; + specialize qw/vp10_fht4x4 msa/; + + add_proto qw/void vp10_fht8x8/, "const int16_t *input, tran_low_t *output, int stride, int tx_type"; + specialize qw/vp10_fht8x8 msa/; + + add_proto qw/void vp10_fht16x16/, "const int16_t *input, tran_low_t *output, int stride, int tx_type"; + specialize qw/vp10_fht16x16 msa/; +} add_proto qw/void vp10_fht32x32/, "const int16_t *input, tran_low_t *output, int stride, int tx_type"; specialize qw/vp10_fht32x32/; -- 2.50.1