From 4a48147c2324adb1825cacecf53c68e6fa797ed1 Mon Sep 17 00:00:00 2001 From: Craig Topper Date: Wed, 26 Apr 2017 05:59:19 +0000 Subject: [PATCH] [InstCombine] Add test cases for opportunities to improve knownbits handling for cttz and ctlz intrinsics. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@301385 91177308-0d34-0410-b5e6-96231b3b80d8 --- test/Transforms/InstCombine/intrinsics.ll | 26 +++++++++++++++++++++++ 1 file changed, 26 insertions(+) diff --git a/test/Transforms/InstCombine/intrinsics.ll b/test/Transforms/InstCombine/intrinsics.ll index e8f5ddd329f..b9e20844058 100644 --- a/test/Transforms/InstCombine/intrinsics.ll +++ b/test/Transforms/InstCombine/intrinsics.ll @@ -281,6 +281,19 @@ define i32 @cttz(i32 %a) { ret i32 %count } +define i1 @cttz_knownbits(i32 %arg) { +; CHECK-LABEL: @cttz_knownbits( +; CHECK-NEXT: [[OR:%.*]] = or i32 [[ARG:%.*]], 4 +; CHECK-NEXT: [[CNT:%.*]] = call i32 @llvm.cttz.i32(i32 [[OR]], i1 true) #0 +; CHECK-NEXT: [[RES:%.*]] = icmp eq i32 [[CNT]], 4 +; CHECK-NEXT: ret i1 [[RES]] +; + %or = or i32 %arg, 4 + %cnt = call i32 @llvm.cttz.i32(i32 %or, i1 true) nounwind readnone + %res = icmp eq i32 %cnt, 4 + ret i1 %res +} + define i8 @ctlz(i8 %a) { ; CHECK-LABEL: @ctlz( ; CHECK-NEXT: ret i8 2 @@ -291,6 +304,19 @@ define i8 @ctlz(i8 %a) { ret i8 %count } +define i1 @ctlz_knownbits(i8 %arg) { +; CHECK-LABEL: @ctlz_knownbits( +; CHECK-NEXT: [[OR:%.*]] = or i8 [[ARG:%.*]], 32 +; CHECK-NEXT: [[CNT:%.*]] = call i8 @llvm.ctlz.i8(i8 [[OR]], i1 true) #0 +; CHECK-NEXT: [[RES:%.*]] = icmp eq i8 [[CNT]], 4 +; CHECK-NEXT: ret i1 [[RES]] +; + %or = or i8 %arg, 32 + %cnt = call i8 @llvm.ctlz.i8(i8 %or, i1 true) nounwind readnone + %res = icmp eq i8 %cnt, 4 + ret i1 %res +} + define void @cmp.simplify(i32 %a, i32 %b, i1* %c) { %lz = tail call i32 @llvm.ctlz.i32(i32 %a, i1 false) nounwind readnone %lz.cmp = icmp eq i32 %lz, 32 -- 2.40.0