From 463eb89d5e36b05d74c14b937384076d745b3b84 Mon Sep 17 00:00:00 2001 From: Michael Liao Date: Sat, 10 Nov 2012 05:17:46 +0000 Subject: [PATCH] Add clang support of RTM from TSX - New options '-mrtm'/'-mno-rtm' are added to enable/disable RTM feature - Builtin macro '__RTM__' is defined if RTM feature is enabled - RTM intrinsic header is added and introduces 3 new intrinsics, namely '_xbegin', '_xend', and '_xabort'. - 3 new builtins are added to keep compatible with gcc, namely '__builtin_ia32_xbegin', '__builtin_ia32_xend', and '__builtin_ia32_xabort'. - Test cases for pre-defined macro and new intrinsic codegen are added. git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@167665 91177308-0d34-0410-b5e6-96231b3b80d8 --- include/clang/Basic/BuiltinsX86.def | 3 ++ include/clang/Driver/Options.td | 2 + lib/Basic/Targets.cpp | 22 ++++++++-- lib/Headers/CMakeLists.txt | 1 + lib/Headers/immintrin.h | 4 ++ lib/Headers/rtmintrin.h | 49 ++++++++++++++++++++++ test/CodeGen/rtm-builtins.c | 23 ++++++++++ test/Preprocessor/predefined-arch-macros.c | 2 + 8 files changed, 103 insertions(+), 3 deletions(-) create mode 100644 lib/Headers/rtmintrin.h create mode 100644 test/CodeGen/rtm-builtins.c diff --git a/include/clang/Basic/BuiltinsX86.def b/include/clang/Basic/BuiltinsX86.def index dc850c438c..5b46f8e6ad 100644 --- a/include/clang/Basic/BuiltinsX86.def +++ b/include/clang/Basic/BuiltinsX86.def @@ -736,5 +736,8 @@ BUILTIN(__builtin_ia32_vfrczps, "V4fV4f", "") BUILTIN(__builtin_ia32_vfrczpd, "V2dV2d", "") BUILTIN(__builtin_ia32_vfrczps256, "V8fV8f", "") BUILTIN(__builtin_ia32_vfrczpd256, "V4dV4d", "") +BUILTIN(__builtin_ia32_xbegin, "i", "") +BUILTIN(__builtin_ia32_xend, "v", "") +BUILTIN(__builtin_ia32_xabort, "vIc", "") #undef BUILTIN diff --git a/include/clang/Driver/Options.td b/include/clang/Driver/Options.td index e657aacc51..c5f7209a98 100644 --- a/include/clang/Driver/Options.td +++ b/include/clang/Driver/Options.td @@ -826,6 +826,7 @@ def mno_fma4 : Flag<["-"], "mno-fma4">, Group; def mno_fma : Flag<["-"], "mno-fma">, Group; def mno_xop : Flag<["-"], "mno-xop">, Group; def mno_f16c : Flag<["-"], "mno-f16c">, Group; +def mno_rtm : Flag<["-"], "mno-rtm">, Group; def mno_thumb : Flag<["-"], "mno-thumb">, Group; def marm : Flag<["-"], "marm">, Alias; @@ -867,6 +868,7 @@ def mfma4 : Flag<["-"], "mfma4">, Group; def mfma : Flag<["-"], "mfma">, Group; def mxop : Flag<["-"], "mxop">, Group; def mf16c : Flag<["-"], "mf16c">, Group; +def mrtm : Flag<["-"], "mrtm">, Group; def mips16 : Flag<["-"], "mips16">, Group; def mno_mips16 : Flag<["-"], "mno-mips16">, Group; def mdsp : Flag<["-"], "mdsp">, Group; diff --git a/lib/Basic/Targets.cpp b/lib/Basic/Targets.cpp index ed3bd0be49..26a4f41442 100644 --- a/lib/Basic/Targets.cpp +++ b/lib/Basic/Targets.cpp @@ -1470,6 +1470,7 @@ class X86TargetInfo : public TargetInfo { bool HasBMI; bool HasBMI2; bool HasPOPCNT; + bool HasRTM; bool HasSSE4a; bool HasFMA4; bool HasFMA; @@ -1620,9 +1621,9 @@ public: X86TargetInfo(const std::string& triple) : TargetInfo(triple), SSELevel(NoSSE), MMX3DNowLevel(NoMMX3DNow), HasAES(false), HasPCLMUL(false), HasLZCNT(false), HasRDRND(false), - HasBMI(false), HasBMI2(false), HasPOPCNT(false), HasSSE4a(false), - HasFMA4(false), HasFMA(false), HasXOP(false), HasF16C(false), - CPU(CK_Generic) { + HasBMI(false), HasBMI2(false), HasPOPCNT(false), HasRTM(false), + HasSSE4a(false), HasFMA4(false), HasFMA(false), HasXOP(false), + HasF16C(false), CPU(CK_Generic) { BigEndian = false; LongDoubleFormat = &llvm::APFloat::x87DoubleExtended; } @@ -1826,6 +1827,7 @@ void X86TargetInfo::getDefaultFeatures(llvm::StringMap &Features) const { Features["bmi"] = false; Features["bmi2"] = false; Features["popcnt"] = false; + Features["rtm"] = false; Features["fma4"] = false; Features["fma"] = false; Features["xop"] = false; @@ -1906,6 +1908,7 @@ void X86TargetInfo::getDefaultFeatures(llvm::StringMap &Features) const { setFeatureEnabled(Features, "rdrnd", true); setFeatureEnabled(Features, "bmi", true); setFeatureEnabled(Features, "bmi2", true); + setFeatureEnabled(Features, "rtm", true); setFeatureEnabled(Features, "fma", true); break; case CK_K6: @@ -2042,6 +2045,8 @@ bool X86TargetInfo::setFeatureEnabled(llvm::StringMap &Features, Features["popcnt"] = true; else if (Name == "f16c") Features["f16c"] = true; + else if (Name == "rtm") + Features["rtm"] = true; } else { if (Name == "mmx") Features["mmx"] = Features["3dnow"] = Features["3dnowa"] = false; @@ -2104,6 +2109,8 @@ bool X86TargetInfo::setFeatureEnabled(llvm::StringMap &Features, Features["xop"] = false; else if (Name == "f16c") Features["f16c"] = false; + else if (Name == "rtm") + Features["rtm"] = false; } return true; @@ -2155,6 +2162,11 @@ void X86TargetInfo::HandleTargetFeatures(std::vector &Features) { continue; } + if (Feature == "rtm") { + HasRTM = true; + continue; + } + if (Feature == "sse4a") { HasSSE4a = true; continue; @@ -2376,6 +2388,9 @@ void X86TargetInfo::getTargetDefines(const LangOptions &Opts, if (HasPOPCNT) Builder.defineMacro("__POPCNT__"); + if (HasRTM) + Builder.defineMacro("__RTM__"); + if (HasSSE4a) Builder.defineMacro("__SSE4A__"); @@ -2463,6 +2478,7 @@ bool X86TargetInfo::hasFeature(StringRef Feature) const { .Case("mmx", MMX3DNowLevel >= MMX) .Case("pclmul", HasPCLMUL) .Case("popcnt", HasPOPCNT) + .Case("rtm", HasRTM) .Case("sse", SSELevel >= SSE1) .Case("sse2", SSELevel >= SSE2) .Case("sse3", SSELevel >= SSE3) diff --git a/lib/Headers/CMakeLists.txt b/lib/Headers/CMakeLists.txt index ca83793767..25e4d903bb 100644 --- a/lib/Headers/CMakeLists.txt +++ b/lib/Headers/CMakeLists.txt @@ -20,6 +20,7 @@ set(files nmmintrin.h pmmintrin.h popcntintrin.h + rtmintrin.h smmintrin.h stdalign.h stdarg.h diff --git a/lib/Headers/immintrin.h b/lib/Headers/immintrin.h index 15b65f3fd8..cd733bfc71 100644 --- a/lib/Headers/immintrin.h +++ b/lib/Headers/immintrin.h @@ -98,4 +98,8 @@ _rdrand64_step(unsigned long long *__p) #endif #endif /* __RDRND__ */ +#ifdef __RTM__ +#include +#endif + #endif /* __IMMINTRIN_H */ diff --git a/lib/Headers/rtmintrin.h b/lib/Headers/rtmintrin.h new file mode 100644 index 0000000000..bdc2b99426 --- /dev/null +++ b/lib/Headers/rtmintrin.h @@ -0,0 +1,49 @@ +/*===---- rtmintrin.h - RTM intrinsics -------------------------------------=== + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + * + *===-----------------------------------------------------------------------=== + */ + +#ifndef __IMMINTRIN_H +#error "Never use directly; include instead." +#endif + +#define _XBEGIN_STARTED (~0u) +#define _XABORT_EXPLICIT (1 << 0) +#define _XABORT_RETRY (1 << 1) +#define _XABORT_CONFLICT (1 << 2) +#define _XABORT_CAPACITY (1 << 3) +#define _XABORT_DEBUG (1 << 4) +#define _XABORT_NESTED (1 << 5) +#define _XABORT_CODE(x) (((x) >> 24) & 0xFF) + +static __inline__ unsigned int __attribute__((__always_inline__, __nodebug__)) +_xbegin(void) +{ + return __builtin_ia32_xbegin(); +} + +static __inline__ void __attribute__((__always_inline__, __nodebug__)) +_xend(void) +{ + __builtin_ia32_xend(); +} + +#define _xabort(imm) __builtin_ia32_xabort((imm)) diff --git a/test/CodeGen/rtm-builtins.c b/test/CodeGen/rtm-builtins.c new file mode 100644 index 0000000000..c4939a9a3d --- /dev/null +++ b/test/CodeGen/rtm-builtins.c @@ -0,0 +1,23 @@ +// RUN: %clang_cc1 %s -O3 -triple=x86_64-apple-darwin -target-feature +rtm -emit-llvm -o - | FileCheck %s + +// Don't include mm_malloc.h, it's system specific. +#define __MM_MALLOC_H + +#include + +unsigned int test_xbegin(void) { + // CHECK: i32 @llvm.x86.xbegin() + return _xbegin(); +} + +void +test_xend(void) { + // CHECK: void @llvm.x86.xend() + _xend(); +} + +void +test_xabort(void) { + // CHECK: void @llvm.x86.xabort(i8 2) + _xabort(2); +} diff --git a/test/Preprocessor/predefined-arch-macros.c b/test/Preprocessor/predefined-arch-macros.c index 2361abe20c..719f945fd6 100644 --- a/test/Preprocessor/predefined-arch-macros.c +++ b/test/Preprocessor/predefined-arch-macros.c @@ -516,6 +516,7 @@ // CHECK_CORE_AVX2_M32: #define __PCLMUL__ 1 // CHECK_CORE_AVX2_M32: #define __POPCNT__ 1 // CHECK_CORE_AVX2_M32: #define __RDRND__ 1 +// CHECK_CORE_AVX2_M32: #define __RTM__ 1 // CHECK_CORE_AVX2_M32: #define __SSE2__ 1 // CHECK_CORE_AVX2_M32: #define __SSE3__ 1 // CHECK_CORE_AVX2_M32: #define __SSE4_1__ 1 @@ -541,6 +542,7 @@ // CHECK_CORE_AVX2_M64: #define __PCLMUL__ 1 // CHECK_CORE_AVX2_M64: #define __POPCNT__ 1 // CHECK_CORE_AVX2_M64: #define __RDRND__ 1 +// CHECK_CORE_AVX2_M64: #define __RTM__ 1 // CHECK_CORE_AVX2_M64: #define __SSE2_MATH__ 1 // CHECK_CORE_AVX2_M64: #define __SSE2__ 1 // CHECK_CORE_AVX2_M64: #define __SSE3__ 1 -- 2.40.0