From 4344a2817fc9e88036410614d540ed558da8dfd3 Mon Sep 17 00:00:00 2001 From: Tim Northover Date: Mon, 10 Oct 2016 21:49:42 +0000 Subject: [PATCH] GlobalISel: support selecting constants on AArch64. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@283806 91177308-0d34-0410-b5e6-96231b3b80d8 --- .../AArch64/AArch64InstructionSelector.cpp | 10 ++++++ .../GlobalISel/arm64-instructionselect.mir | 33 +++++++++++++++++++ 2 files changed, 43 insertions(+) diff --git a/lib/Target/AArch64/AArch64InstructionSelector.cpp b/lib/Target/AArch64/AArch64InstructionSelector.cpp index efb2dbc64a9..addf60a102d 100644 --- a/lib/Target/AArch64/AArch64InstructionSelector.cpp +++ b/lib/Target/AArch64/AArch64InstructionSelector.cpp @@ -229,6 +229,16 @@ bool AArch64InstructionSelector::select(MachineInstr &I) const { return true; } + case TargetOpcode::G_CONSTANT: { + if (Ty.getSizeInBits() <= 32) + I.setDesc(TII.get(AArch64::MOVi32imm)); + else if (Ty.getSizeInBits() <= 64) + I.setDesc(TII.get(AArch64::MOVi64imm)); + else + return false; + return constrainSelectedInstRegOperands(I, TII, TRI, RBI); + } + case TargetOpcode::G_FRAME_INDEX: { // allocas and G_FRAME_INDEX are only supported in addrspace(0). if (Ty != LLT::pointer(0, 64)) { diff --git a/test/CodeGen/AArch64/GlobalISel/arm64-instructionselect.mir b/test/CodeGen/AArch64/GlobalISel/arm64-instructionselect.mir index bbdf0fc8736..5dbdc7e101d 100644 --- a/test/CodeGen/AArch64/GlobalISel/arm64-instructionselect.mir +++ b/test/CodeGen/AArch64/GlobalISel/arm64-instructionselect.mir @@ -67,6 +67,9 @@ define void @selected_property() { ret void } + define i32 @const_s32() { ret i32 42 } + define i64 @const_s64() { ret i64 1234567890123 } + ... --- @@ -1088,3 +1091,33 @@ selected: false body: | bb.0: ... + +--- +# CHECK-LABEL: name: const_s32 +name: const_s32 +legalized: true +regBankSelected: true +registers: + - { id: 0, class: gpr } + +# CHECK: body: +# CHECK: %0 = MOVi32imm 42 +body: | + bb.0: + %0(s32) = G_CONSTANT 42 +... + +--- +# CHECK-LABEL: name: const_s64 +name: const_s64 +legalized: true +regBankSelected: true +registers: + - { id: 0, class: gpr } + +# CHECK: body: +# CHECK: %0 = MOVi64imm 1234567890123 +body: | + bb.0: + %0(s64) = G_CONSTANT 1234567890123 +... -- 2.50.1