From 3bfb126ba5a90ab977b0dd3c261c00401729796c Mon Sep 17 00:00:00 2001 From: Benjamin Kramer Date: Tue, 31 Jan 2017 14:13:53 +0000 Subject: [PATCH] [X86] Silence unused variable warning in Release builds. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@293631 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/Target/X86/X86ISelLowering.cpp | 9 +++++---- 1 file changed, 5 insertions(+), 4 deletions(-) diff --git a/lib/Target/X86/X86ISelLowering.cpp b/lib/Target/X86/X86ISelLowering.cpp index f1d6c704017..8bbe21c9b3a 100644 --- a/lib/Target/X86/X86ISelLowering.cpp +++ b/lib/Target/X86/X86ISelLowering.cpp @@ -30610,10 +30610,11 @@ static SDValue combineVectorShift(SDNode *N, SelectionDAG &DAG, static SDValue combineVectorInsert(SDNode *N, SelectionDAG &DAG, TargetLowering::DAGCombinerInfo &DCI, const X86Subtarget &Subtarget) { - unsigned Opcode = N->getOpcode(); - assert(((X86ISD::PINSRB == Opcode && N->getValueType(0) ==MVT::v16i8) || - (X86ISD::PINSRW == Opcode && N->getValueType(0) ==MVT::v8i16)) && - "Unexpected vector insertion"); + assert( + ((N->getOpcode() == X86ISD::PINSRB && N->getValueType(0) == MVT::v16i8) || + (N->getOpcode() == X86ISD::PINSRW && + N->getValueType(0) == MVT::v8i16)) && + "Unexpected vector insertion"); // Attempt to combine PINSRB/PINSRW patterns to a shuffle. SDValue Op(N, 0); -- 2.50.1