From 38b7ee369ee1a1a8be561e14ab1a36d6a4d8cbed Mon Sep 17 00:00:00 2001 From: Dmitry Preobrazhensky Date: Tue, 18 Jul 2017 11:14:02 +0000 Subject: [PATCH] [AMDGPU][MC] Optimized IsRegIntersect function Optimized IsRegIntersect by using MCRegAliasIterator See Bug 33800: https://bugs.llvm.org//show_bug.cgi?id=33800 Reviewers: arsenm, artem.tamazov Differential Revision: https://reviews.llvm.org/D35452 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@308294 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp | 18 ++---------------- 1 file changed, 2 insertions(+), 16 deletions(-) diff --git a/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp b/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp index 26515b27bb7..67ad904ca97 100644 --- a/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp +++ b/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp @@ -539,23 +539,9 @@ bool isSGPR(unsigned Reg, const MCRegisterInfo* TRI) { } bool isRegIntersect(unsigned Reg0, unsigned Reg1, const MCRegisterInfo* TRI) { - - if (Reg0 == Reg1) { - return true; + for (MCRegAliasIterator R(Reg0, TRI, true); R.isValid(); ++R) { + if (*R == Reg1) return true; } - - unsigned SubReg0 = TRI->getSubReg(Reg0, 1); - if (SubReg0 == 0) { - return TRI->getSubRegIndex(Reg1, Reg0) > 0; - } - - for (unsigned Idx = 2; SubReg0 > 0; ++Idx) { - if (isRegIntersect(Reg1, SubReg0, TRI)) { - return true; - } - SubReg0 = TRI->getSubReg(Reg0, Idx); - } - return false; } -- 2.40.0