From 38316c07ef837c35e8aa3879617fb6a413e63fbe Mon Sep 17 00:00:00 2001 From: Craig Topper Date: Wed, 1 Nov 2017 00:47:45 +0000 Subject: [PATCH] [X86] Add AVX512 support to X86FastISel::fastMaterializeFloatZero. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@317059 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/Target/X86/X86FastISel.cpp | 9 +++++---- 1 file changed, 5 insertions(+), 4 deletions(-) diff --git a/lib/Target/X86/X86FastISel.cpp b/lib/Target/X86/X86FastISel.cpp index 2db058ff16f..c248fb34964 100644 --- a/lib/Target/X86/X86FastISel.cpp +++ b/lib/Target/X86/X86FastISel.cpp @@ -3876,14 +3876,15 @@ unsigned X86FastISel::fastMaterializeFloatZero(const ConstantFP *CF) { return 0; // Get opcode and regclass for the given zero. + bool HasAVX512 = Subtarget->hasAVX512(); unsigned Opc = 0; const TargetRegisterClass *RC = nullptr; switch (VT.SimpleTy) { default: return 0; case MVT::f32: if (X86ScalarSSEf32) { - Opc = X86::FsFLD0SS; - RC = &X86::FR32RegClass; + Opc = HasAVX512 ? X86::AVX512_FsFLD0SS : X86::FsFLD0SS; + RC = HasAVX512 ? &X86::FR32XRegClass : &X86::FR32RegClass; } else { Opc = X86::LD_Fp032; RC = &X86::RFP32RegClass; @@ -3891,8 +3892,8 @@ unsigned X86FastISel::fastMaterializeFloatZero(const ConstantFP *CF) { break; case MVT::f64: if (X86ScalarSSEf64) { - Opc = X86::FsFLD0SD; - RC = &X86::FR64RegClass; + Opc = HasAVX512 ? X86::AVX512_FsFLD0SD : X86::FsFLD0SD; + RC = HasAVX512 ? &X86::FR64XRegClass : &X86::FR64RegClass; } else { Opc = X86::LD_Fp064; RC = &X86::RFP64RegClass; -- 2.50.1