From 37790cc1f7058a7f5ec628f33afb3f45615e49af Mon Sep 17 00:00:00 2001 From: Matthias Braun Date: Tue, 17 Oct 2017 21:46:15 +0000 Subject: [PATCH] AArch64: Enable AES instruction fusion on Cyclone. Note that cyclone itself doesn't fuse, but newer apple chips do and we are using cyclone as the default when targeting apple OSes. The current code also does not capture all fusion patterns of apple CPUs yet; I am still looking for ways to refactor the code nicely to extend it. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@316036 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/Target/AArch64/AArch64.td | 7 +++++-- 1 file changed, 5 insertions(+), 2 deletions(-) diff --git a/lib/Target/AArch64/AArch64.td b/lib/Target/AArch64/AArch64.td index 500632b50cd..ce0bce5e3ae 100644 --- a/lib/Target/AArch64/AArch64.td +++ b/lib/Target/AArch64/AArch64.td @@ -274,14 +274,17 @@ def ProcA75 : SubtargetFeature<"a75", "ARMProcFamily", "CortexA75", FeaturePerfMon ]>; +// Note that cyclone does not fuse AES instructions, but newer apple chips do +// perform the fusion and cyclone is used by default when targetting apple OSes. def ProcCyclone : SubtargetFeature<"cyclone", "ARMProcFamily", "Cyclone", "Cyclone", [ FeatureAlternateSExtLoadCVTF32Pattern, + FeatureArithmeticBccFusion, + FeatureArithmeticCbzFusion, FeatureCrypto, FeatureDisableLatencySchedHeuristic, FeatureFPARMv8, - FeatureArithmeticBccFusion, - FeatureArithmeticCbzFusion, + FeatureFuseAES, FeatureNEON, FeaturePerfMon, FeatureSlowMisaligned128Store, -- 2.40.0