From 367cfd84c37f7535b7f29e40b76eca01e24bcd60 Mon Sep 17 00:00:00 2001 From: Matt Arsenault Date: Mon, 23 Oct 2017 17:09:35 +0000 Subject: [PATCH] AMDGPU: Fix default range in non-kernel functions The range should be assumed to be the hardware maximum if a workitem intrinsic is used in a callable function which does not know the restricted limit of the calling kernel. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@316346 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/Target/AMDGPU/AMDGPUSubtarget.cpp | 25 +++++++++++++++++++++---- lib/Target/AMDGPU/AMDGPUSubtarget.h | 3 +++ test/CodeGen/AMDGPU/zext-lid.ll | 22 ++++++++++++++++++++++ 3 files changed, 46 insertions(+), 4 deletions(-) diff --git a/lib/Target/AMDGPU/AMDGPUSubtarget.cpp b/lib/Target/AMDGPU/AMDGPUSubtarget.cpp index ddc1cd457b4..06ebff7b394 100644 --- a/lib/Target/AMDGPU/AMDGPUSubtarget.cpp +++ b/lib/Target/AMDGPU/AMDGPUSubtarget.cpp @@ -190,14 +190,31 @@ unsigned AMDGPUSubtarget::getOccupancyWithLocalMemSize(uint32_t Bytes, return NumWaves; } +std::pair +AMDGPUSubtarget::getDefaultFlatWorkGroupSize(CallingConv::ID CC) const { + switch (CC) { + case CallingConv::AMDGPU_CS: + case CallingConv::AMDGPU_KERNEL: + case CallingConv::SPIR_KERNEL: + return std::make_pair(getWavefrontSize() * 2, getWavefrontSize() * 4); + case CallingConv::AMDGPU_VS: + case CallingConv::AMDGPU_LS: + case CallingConv::AMDGPU_HS: + case CallingConv::AMDGPU_ES: + case CallingConv::AMDGPU_GS: + case CallingConv::AMDGPU_PS: + return std::make_pair(1, getWavefrontSize()); + default: + return std::make_pair(1, 16 * getWavefrontSize()); + } +} + std::pair AMDGPUSubtarget::getFlatWorkGroupSizes( const Function &F) const { + // FIXME: 1024 if function. // Default minimum/maximum flat work group sizes. std::pair Default = - AMDGPU::isCompute(F.getCallingConv()) ? - std::pair(getWavefrontSize() * 2, - getWavefrontSize() * 4) : - std::pair(1, getWavefrontSize()); + getDefaultFlatWorkGroupSize(F.getCallingConv()); // TODO: Do not process "amdgpu-max-work-group-size" attribute once mesa // starts using "amdgpu-flat-work-group-size" attribute. diff --git a/lib/Target/AMDGPU/AMDGPUSubtarget.h b/lib/Target/AMDGPU/AMDGPUSubtarget.h index 52e08e538f7..99c525eb9d7 100644 --- a/lib/Target/AMDGPU/AMDGPUSubtarget.h +++ b/lib/Target/AMDGPU/AMDGPUSubtarget.h @@ -587,6 +587,9 @@ public: FlatWorkGroupSize); } + /// \returns Default range flat work group size for a calling convention. + std::pair getDefaultFlatWorkGroupSize(CallingConv::ID CC) const; + /// \returns Subtarget's default pair of minimum/maximum flat work group sizes /// for function \p F, or minimum/maximum flat work group sizes explicitly /// requested using "amdgpu-flat-work-group-size" attribute attached to diff --git a/test/CodeGen/AMDGPU/zext-lid.ll b/test/CodeGen/AMDGPU/zext-lid.ll index 066f2927727..9a9c1fe7550 100644 --- a/test/CodeGen/AMDGPU/zext-lid.ll +++ b/test/CodeGen/AMDGPU/zext-lid.ll @@ -63,6 +63,26 @@ bb: ret void } +; OPT-LABEL: @func_test_workitem_id_x_known_max_range( +; OPT: tail call i32 @llvm.amdgcn.workitem.id.x(), !range !0 +define void @func_test_workitem_id_x_known_max_range(i32 addrspace(1)* nocapture %out) #0 { +entry: + %id = tail call i32 @llvm.amdgcn.workitem.id.x() + %and = and i32 %id, 1023 + store i32 %and, i32 addrspace(1)* %out, align 4 + ret void +} + +; OPT-LABEL: @func_test_workitem_id_x_default_range( +; OPT: tail call i32 @llvm.amdgcn.workitem.id.x(), !range !6 +define void @func_test_workitem_id_x_default_range(i32 addrspace(1)* nocapture %out) #4 { +entry: + %id = tail call i32 @llvm.amdgcn.workitem.id.x() + %and = and i32 %id, 1023 + store i32 %and, i32 addrspace(1)* %out, align 4 + ret void +} + declare i32 @llvm.amdgcn.workitem.id.x() #2 declare i32 @llvm.amdgcn.workitem.id.y() #2 @@ -73,6 +93,7 @@ attributes #0 = { nounwind "amdgpu-flat-work-group-size"="64,128" } attributes #1 = { nounwind "amdgpu-flat-work-group-size"="512,512" } attributes #2 = { nounwind readnone speculatable } attributes #3 = { nounwind readnone } +attributes #4 = { nounwind } !0 = !{i32 32, i32 4, i32 1} @@ -82,3 +103,4 @@ attributes #3 = { nounwind readnone } ; OPT: !3 = !{i32 0, i32 4} ; OPT: !4 = !{i32 0, i32 1} ; OPT: !5 = !{i32 0, i32 512} +; OPT: !6 = !{i32 0, i32 1024} -- 2.40.0