From 33ebd6e80ea5866ac13d0cb5e37dbfcff40d6402 Mon Sep 17 00:00:00 2001 From: Craig Topper Date: Sun, 20 Aug 2017 19:47:00 +0000 Subject: [PATCH] [AVX512] Add a test to check what happens when a load is referenced by two different masked scalar intrinsics with the same op inputs, but different masking node. We're missing some single use checks in the sse_load_f32/f64 handling that cause us to replicate the load. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@311300 91177308-0d34-0410-b5e6-96231b3b80d8 --- test/CodeGen/X86/avx512-memfold.ll | 21 +++++++++++++++++++++ 1 file changed, 21 insertions(+) diff --git a/test/CodeGen/X86/avx512-memfold.ll b/test/CodeGen/X86/avx512-memfold.ll index 17cb30255f7..e1bb87af568 100644 --- a/test/CodeGen/X86/avx512-memfold.ll +++ b/test/CodeGen/X86/avx512-memfold.ll @@ -66,3 +66,24 @@ define <2 x double> @test_int_x86_avx512_mask_vfmadd_sd(<2 x double> %a, <2 x do %res = call <2 x double> @llvm.x86.avx512.mask.vfmadd.sd(<2 x double> %a, <2 x double> %b, <2 x double> %cv, i8 %mask, i32 4) ret <2 x double> %res } + +; Test what happens when the load when we have multiple uses of the fadds DAG node via separate vselect nodes. +; TODO: We shouldn't fold the load twice here. +define <4 x float> @test_mask_add_ss_double_use(<4 x float> %a, float* %b, i8 %mask, <4 x float> %c) { +; CHECK-LABEL: test_mask_add_ss_double_use: +; CHECK: ## BB#0: +; CHECK-NEXT: kmovw %esi, %k1 +; CHECK-NEXT: vaddss (%rdi), %xmm0, %xmm1 {%k1} +; CHECK-NEXT: vaddss (%rdi), %xmm0, %xmm0 {%k1} {z} +; CHECK-NEXT: vmulps %xmm0, %xmm1, %xmm0 +; CHECK-NEXT: retq + %b.val = load float, float* %b + %bv0 = insertelement <4 x float> undef, float %b.val, i32 0 + %bv1 = insertelement <4 x float> %bv0, float 0.000000e+00, i32 1 + %bv2 = insertelement <4 x float> %bv1, float 0.000000e+00, i32 2 + %bv = insertelement <4 x float> %bv2, float 0.000000e+00, i32 3 + %res = call <4 x float> @llvm.x86.avx512.mask.add.ss.round(<4 x float> %a, <4 x float> %bv, <4 x float> %c, i8 %mask, i32 4) + %res2 = call <4 x float> @llvm.x86.avx512.mask.add.ss.round(<4 x float> %a, <4 x float> %bv, <4 x float> zeroinitializer, i8 %mask, i32 4) + %res3 = fmul <4 x float> %res, %res2 + ret <4 x float> %res3 +} -- 2.50.1