From 30bc60c9e3b485fde1b5302ad7db776d7e185e04 Mon Sep 17 00:00:00 2001
From: Simon Pilgrim <llvm-dev@redking.me.uk>
Date: Thu, 11 Apr 2019 15:09:03 +0000
Subject: [PATCH] [X86][AVX] Tweak X86ISD::VPERMV3 demandedelts test

Original test was too dependent on the order of the combines that could cause the inserted element being demanded after all

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@358182 91177308-0d34-0410-b5e6-96231b3b80d8
---
 test/CodeGen/X86/vector-shuffle-combining-avx512bw.ll | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/test/CodeGen/X86/vector-shuffle-combining-avx512bw.ll b/test/CodeGen/X86/vector-shuffle-combining-avx512bw.ll
index eee3fe26a55..b180a517032 100644
--- a/test/CodeGen/X86/vector-shuffle-combining-avx512bw.ll
+++ b/test/CodeGen/X86/vector-shuffle-combining-avx512bw.ll
@@ -928,7 +928,7 @@ define <8 x double> @combine_vpermi2var_8f64_as_permpd(<8 x double> %x0, <8 x do
 ; X86-NEXT:    vinserti128 $1, {{\.LCPI.*}}, %ymm2, %ymm2
 ; X86-NEXT:    vinserti64x4 $1, {{\.LCPI.*}}, %zmm2, %zmm2
 ; X86-NEXT:    vpermi2pd %zmm1, %zmm0, %zmm2
-; X86-NEXT:    vpermpd {{.*#+}} zmm0 = zmm2[2,3,0,1,6,7,4,5]
+; X86-NEXT:    vpermpd {{.*#+}} zmm0 = zmm2[2,3,1,1,6,7,5,5]
 ; X86-NEXT:    retl
 ;
 ; X64-LABEL: combine_vpermi2var_8f64_as_permpd:
@@ -938,11 +938,11 @@ define <8 x double> @combine_vpermi2var_8f64_as_permpd(<8 x double> %x0, <8 x do
 ; X64-NEXT:    vmovdqa64 {{.*#+}} zmm3 = <u,2,1,3,4,6,5,7>
 ; X64-NEXT:    vinserti32x4 $0, %xmm2, %zmm3, %zmm2
 ; X64-NEXT:    vpermi2pd %zmm1, %zmm0, %zmm2
-; X64-NEXT:    vpermpd {{.*#+}} zmm0 = zmm2[2,3,0,1,6,7,4,5]
+; X64-NEXT:    vpermpd {{.*#+}} zmm0 = zmm2[2,3,1,1,6,7,5,5]
 ; X64-NEXT:    retq
   %res0 = insertelement <8 x i64> <i64 0, i64 2, i64 1, i64 3, i64 4, i64 6, i64 5, i64 7>, i64 %a2, i32 0
   %res1 = call <8 x double> @llvm.x86.avx512.mask.vpermi2var.pd.512(<8 x double> %x0, <8 x i64> %res0, <8 x double> %x1, i8 -1)
-  %res2 = shufflevector <8 x double> %res1, <8 x double> undef, <8 x i32> <i32 2, i32 3, i32 undef, i32 1, i32 6, i32 7, i32 4, i32 5>
+  %res2 = shufflevector <8 x double> %res1, <8 x double> undef, <8 x i32> <i32 2, i32 3, i32 1, i32 1, i32 6, i32 7, i32 5, i32 5>
   ret <8 x double> %res2
 }
 
-- 
2.50.1