From 2e825a56b64d4ab9006343f77a82724c4820df9e Mon Sep 17 00:00:00 2001 From: Matt Arsenault Date: Mon, 14 Aug 2017 19:54:45 +0000 Subject: [PATCH] IPRA: Run RegUsageInfoPropagate much later This was running immediately after isel, before isel pseudos were even expanded which is really unreasonable. Move this to before pre-reglloc passes in case some other pre-regalloc pass wants to use the updated regmask info. Fixes one of the reasons IPRA doesn't do anything on AMDGPU currently. Tests will be included with future patch after a few more are fixed. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@310875 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/CodeGen/TargetPassConfig.cpp | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/lib/CodeGen/TargetPassConfig.cpp b/lib/CodeGen/TargetPassConfig.cpp index de0d2264de2..75a565e898f 100644 --- a/lib/CodeGen/TargetPassConfig.cpp +++ b/lib/CodeGen/TargetPassConfig.cpp @@ -779,9 +779,6 @@ void TargetPassConfig::addMachinePasses() { // Print the instruction selected machine code... printAndVerify("After Instruction Selection"); - if (TM->Options.EnableIPRA) - addPass(createRegUsageInfoPropPass()); - // Expand pseudo-instructions emitted by ISel. addPass(&ExpandISelPseudosID); @@ -794,6 +791,9 @@ void TargetPassConfig::addMachinePasses() { addPass(&LocalStackSlotAllocationID, false); } + if (TM->Options.EnableIPRA) + addPass(createRegUsageInfoPropPass()); + // Run pre-ra passes. addPreRegAlloc(); -- 2.50.1