From 2a686e81e517d69f5eee88fc592fa988952f81d6 Mon Sep 17 00:00:00 2001 From: Roman Lebedev Date: Sat, 10 Aug 2019 19:28:44 +0000 Subject: [PATCH] [InstCombine] Shift amount reassociation in bittest: drop pointless one-use restriction That one-use restriction is not needed for correctness - we have already ensured that one of the shifts will go away, so we know we won't increase the instruction count. So there is no need for that restriction. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@368518 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/Transforms/InstCombine/InstCombineCompares.cpp | 4 ++-- .../shift-amount-reassociation-in-bittest.ll | 12 ++++++------ 2 files changed, 8 insertions(+), 8 deletions(-) diff --git a/lib/Transforms/InstCombine/InstCombineCompares.cpp b/lib/Transforms/InstCombine/InstCombineCompares.cpp index ddbc17075ca..edad6a45121 100644 --- a/lib/Transforms/InstCombine/InstCombineCompares.cpp +++ b/lib/Transforms/InstCombine/InstCombineCompares.cpp @@ -3318,8 +3318,8 @@ foldShiftIntoShiftInAnotherHandOfAndInICmp(ICmpInst &I, const SimplifyQuery SQ, m_CombineAnd(m_AnyLogicalShift, m_Value(YShift))))) return nullptr; - // If YShift is a single-use 'lshr', swap the shifts around. - if (match(YShift, m_OneUse(m_AnyLShr))) + // If YShift is a 'lshr', swap the shifts around. + if (match(YShift, m_AnyLShr)) std::swap(XShift, YShift); // The shifts must be in opposite directions. diff --git a/test/Transforms/InstCombine/shift-amount-reassociation-in-bittest.ll b/test/Transforms/InstCombine/shift-amount-reassociation-in-bittest.ll index b2c0012cf17..18e8cfadfeb 100644 --- a/test/Transforms/InstCombine/shift-amount-reassociation-in-bittest.ll +++ b/test/Transforms/InstCombine/shift-amount-reassociation-in-bittest.ll @@ -279,8 +279,8 @@ define i1 @t18_const_oneuse0(i32 %x, i32 %y) { ; CHECK-LABEL: @t18_const_oneuse0( ; CHECK-NEXT: [[T0:%.*]] = lshr i32 [[X:%.*]], 1 ; CHECK-NEXT: call void @use32(i32 [[T0]]) -; CHECK-NEXT: [[TMP1:%.*]] = shl i32 [[Y:%.*]], 2 -; CHECK-NEXT: [[TMP2:%.*]] = and i32 [[TMP1]], [[X]] +; CHECK-NEXT: [[TMP1:%.*]] = lshr i32 [[X]], 2 +; CHECK-NEXT: [[TMP2:%.*]] = and i32 [[TMP1]], [[Y:%.*]] ; CHECK-NEXT: [[TMP3:%.*]] = icmp ne i32 [[TMP2]], 0 ; CHECK-NEXT: ret i1 [[TMP3]] ; @@ -585,8 +585,8 @@ define i1 @t34_commutativity0_oneuse0(i32 %x) { ; CHECK-NEXT: [[Y:%.*]] = call i32 @gen32() ; CHECK-NEXT: [[T0:%.*]] = lshr i32 [[X:%.*]], 1 ; CHECK-NEXT: call void @use32(i32 [[T0]]) -; CHECK-NEXT: [[TMP1:%.*]] = shl i32 [[Y]], 2 -; CHECK-NEXT: [[TMP2:%.*]] = and i32 [[TMP1]], [[X]] +; CHECK-NEXT: [[TMP1:%.*]] = lshr i32 [[X]], 2 +; CHECK-NEXT: [[TMP2:%.*]] = and i32 [[TMP1]], [[Y]] ; CHECK-NEXT: [[TMP3:%.*]] = icmp ne i32 [[TMP2]], 0 ; CHECK-NEXT: ret i1 [[TMP3]] ; @@ -622,8 +622,8 @@ define i1 @t36_commutativity1_oneuse0(i32 %y) { ; CHECK-NEXT: [[X:%.*]] = call i32 @gen32() ; CHECK-NEXT: [[T0:%.*]] = lshr i32 [[X]], 1 ; CHECK-NEXT: call void @use32(i32 [[T0]]) -; CHECK-NEXT: [[TMP1:%.*]] = shl i32 [[Y:%.*]], 2 -; CHECK-NEXT: [[TMP2:%.*]] = and i32 [[TMP1]], [[X]] +; CHECK-NEXT: [[TMP1:%.*]] = lshr i32 [[X]], 2 +; CHECK-NEXT: [[TMP2:%.*]] = and i32 [[TMP1]], [[Y:%.*]] ; CHECK-NEXT: [[TMP3:%.*]] = icmp ne i32 [[TMP2]], 0 ; CHECK-NEXT: ret i1 [[TMP3]] ; -- 2.40.0